/third_party/ffmpeg/libavcodec/arm/ |
H A D | h264pred_neon.S | 212 vpaddl.s16 d4, d4 254 vpaddl.u8 d0, d0 266 vpaddl.u8 d0, d0 280 vpaddl.u8 q0, q0 306 vpaddl.u8 q0, q0 321 vpaddl.u8 d0, d0 336 vpaddl.u8 q0, q0 353 vpaddl.u8 d2, d1
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H A D | int_neon.S | 47 vpaddl.s32 d3, d2
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H A D | lossless_audiodsp_neon.S | 59 vpaddl.s32 d3, d2
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H A D | rv40dsp_neon.S | 743 vpaddl.u8 q8, q0 @ -2, -2, -2, -2, 1, 1, 1, 1 744 vpaddl.u8 q9, q2 @ -3, -3, -1, -1, 2, 2, 0, 0
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/third_party/ffmpeg/libswscale/arm/ |
H A D | rgb2yuv_neon_common.S | 155 vpaddl.u8 r16x8, r8x16 156 vpaddl.u8 g16x8, g8x16 157 vpaddl.u8 b16x8, b8x16
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/third_party/node/deps/v8/src/diagnostics/arm/ |
H A D | disasm-arm.cc | 2271 Format(instr, q ? "vpaddl.s'size2 'Qd, 'Qm" : "vpaddl.s'size2 'Dd, 'Dm"); in DecodeAdvancedSIMDTwoOrThreeRegisters() 2273 Format(instr, q ? "vpaddl.u'size2 'Qd, 'Qm" : "vpaddl.u'size2 'Dd, 'Dm"); in DecodeAdvancedSIMDTwoOrThreeRegisters()
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/third_party/vixl/src/aarch32/ |
H A D | assembler-aarch32.h | 5178 void vpaddl(Condition cond, DataType dt, DRegister rd, DRegister rm); 5179 void vpaddl(DataType dt, DRegister rd, DRegister rm) { in vpaddl() function in vixl::aarch32::Assembler 5180 vpaddl(al, dt, rd, rm); in vpaddl() 5183 void vpaddl(Condition cond, DataType dt, QRegister rd, QRegister rm); 5184 void vpaddl(DataType dt, QRegister rd, QRegister rm) { in vpaddl() function in vixl::aarch32::Assembler 5185 vpaddl(al, dt, rd, rm); in vpaddl()
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H A D | disasm-aarch32.h | 2145 void vpaddl(Condition cond, DataType dt, DRegister rd, DRegister rm); 2147 void vpaddl(Condition cond, DataType dt, QRegister rd, QRegister rm);
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H A D | assembler-aarch32.cc | 22289 void Assembler::vpaddl(Condition cond, in vpaddl() function in vixl::aarch32::Assembler 22318 Delegate(kVpaddl, &Assembler::vpaddl, cond, dt, rd, rm); in vpaddl() 22321 void Assembler::vpaddl(Condition cond, in vpaddl() function in vixl::aarch32::Assembler 22350 Delegate(kVpaddl, &Assembler::vpaddl, cond, dt, rd, rm); in vpaddl()
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H A D | disasm-aarch32.cc | 5626 void Disassembler::vpaddl(Condition cond, in vpaddl() function in vixl::aarch32::Disassembler 5635 void Disassembler::vpaddl(Condition cond, in vpaddl() function in vixl::aarch32::Disassembler [all...] |
H A D | macro-assembler-aarch32.h | 10176 vpaddl(cond, dt, rd, rm); in MacroAssembler() 10193 vpaddl(cond, dt, rd, rm); in MacroAssembler()
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/third_party/node/deps/v8/src/wasm/baseline/arm/ |
H A D | liftoff-assembler-arm.h | 3179 vpaddl(NeonS16, liftoff::GetSimd128Register(dst), 3185 vpaddl(NeonU16, liftoff::GetSimd128Register(dst), 3399 vpaddl(NeonS8, liftoff::GetSimd128Register(dst), 3405 vpaddl(NeonU8, liftoff::GetSimd128Register(dst),
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/third_party/node/deps/v8/src/codegen/arm/ |
H A D | assembler-arm.h | 927 void vpaddl(NeonDataType dt, QwNeonRegister dst, QwNeonRegister src);
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H A D | assembler-arm.cc | 5046 void Assembler::vpaddl(NeonDataType dt, QwNeonRegister dst, in vpaddl() function in v8::internal::Assembler 5049 // vpaddl.<dt>(Qd, Qm) SIMD Vector Pairwise Add Long. in vpaddl()
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/third_party/node/deps/v8/src/compiler/backend/arm/ |
H A D | code-generator-arm.cc | 1811 __ vpaddl(dt, i.OutputSimd128Register(), i.InputSimd128Register(0)); in AssembleArchInstruction()
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