/third_party/node/deps/v8/src/codegen/arm64/ |
H A D | macro-assembler-arm64.h | 182 int vn_index) { in Mov() 184 mov(vd, vd_index, vn, vn_index); in Mov() 195 void Mov(const Register& rd, const VRegister& vn, int vn_index) { in Mov() argument 197 mov(rd, vn, vn_index); in Mov() 1161 int vn_index) { in Ins() 1163 ins(vd, vd_index, vn, vn_index); in Ins() 1260 void Umov(const Register& rd, const VRegister& vn, int vn_index) { in Umov() argument 1262 umov(rd, vn, vn_index); in Umov() 1289 void Smov(const Register& rd, const VRegister& vn, int vn_index) { in Smov() argument 1291 smov(rd, vn, vn_index); in Smov() 181 Mov(const VRegister& vd, int vd_index, const VRegister& vn, int vn_index) Mov() argument 1160 Ins(const VRegister& vd, int vd_index, const VRegister& vn, int vn_index) Ins() argument [all...] |
H A D | assembler-arm64.h | 1806 void dup(const VRegister& vd, const VRegister& vn, int vn_index); 1818 void umov(const Register& rd, const VRegister& vn, int vn_index); 1821 void mov(const Register& rd, const VRegister& vn, int vn_index); 1824 void mov(const VRegister& vd, const VRegister& vn, int vn_index); 1828 int vn_index); 1832 int vn_index); 1835 void smov(const Register& rd, const VRegister& vn, int vn_index);
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H A D | assembler-arm64.cc | 1908 void Assembler::mov(const Register& rd, const VRegister& vn, int vn_index) { in mov() argument 1910 umov(rd, vn, vn_index); in mov() 1913 void Assembler::smov(const Register& rd, const VRegister& vn, int vn_index) { in smov() argument 1933 DCHECK((0 <= vn_index) && in smov() 1934 (vn_index < LaneCountFromFormat(static_cast<VectorFormat>(format)))); in smov() 1935 Emit(q | NEON_SMOV | ImmNEON5(format, vn_index) | Rn(vn) | Rd(rd)); in smov() 2064 void Assembler::umov(const Register& rd, const VRegister& vn, int vn_index) { in umov() argument 2091 DCHECK((0 <= vn_index) && in umov() 2092 (vn_index < LaneCountFromFormat(static_cast<VectorFormat>(format)))); in umov() 2093 Emit(q | NEON_UMOV | ImmNEON5(format, vn_index) | R in umov() 2096 mov(const VRegister& vd, const VRegister& vn, int vn_index) mov() argument 2108 ins(const VRegister& vd, int vd_index, const VRegister& vn, int vn_index) ins() argument 2215 mov(const VRegister& vd, int vd_index, const VRegister& vn, int vn_index) mov() argument 3488 dup(const VRegister& vd, const VRegister& vn, int vn_index) dup() argument [all...] |
/third_party/vixl/src/aarch64/ |
H A D | assembler-aarch64.cc | 5012 void Assembler::dup(const VRegister& vd, const VRegister& vn, int vn_index) { 5044 Emit(q | scalar | NEON_DUP_ELEMENT | ImmNEON5(format, vn_index) | Rn(vn) | 5049 void Assembler::mov(const VRegister& vd, const VRegister& vn, int vn_index) { 5052 dup(vd, vn, vn_index); 5068 int vn_index) { 5095 (0 <= vn_index) && 5096 (vn_index < LaneCountFromFormat(static_cast<VectorFormat>(format)))); 5098 ImmNEON4(format, vn_index) | Rn(vn) | Rd(vd)); 5105 int vn_index) { 5107 ins(vd, vd_index, vn, vn_index); [all...] |
H A D | macro-assembler-aarch64.h | 3337 int vn_index) { in Ins() 3340 ins(vd, vd_index, vn, vn_index); in Ins() 3458 int vn_index) { in Mov() 3461 mov(vd, vd_index, vn, vn_index); in Mov() 3473 void Mov(const Register& rd, const VRegister& vn, int vn_index) { in Mov() argument 3476 mov(rd, vn, vn_index); in Mov() 3597 void Smov(const Register& rd, const VRegister& vn, int vn_index) { in Smov() argument 3600 smov(rd, vn, vn_index); in Smov() 3602 void Umov(const Register& rd, const VRegister& vn, int vn_index) { in Umov() argument 3605 umov(rd, vn, vn_index); in Umov() 3334 Ins(const VRegister& vd, int vd_index, const VRegister& vn, int vn_index) Ins() argument 3455 Mov(const VRegister& vd, int vd_index, const VRegister& vn, int vn_index) Mov() argument [all...] |
H A D | assembler-aarch64.h | 2836 void dup(const VRegister& vd, const VRegister& vn, int vn_index); 2839 void mov(const VRegister& vd, const VRegister& vn, int vn_index); 2848 int vn_index); 2854 int vn_index); 2863 void umov(const Register& rd, const VRegister& vn, int vn_index); 2866 void mov(const Register& rd, const VRegister& vn, int vn_index); 2869 void smov(const Register& rd, const VRegister& vn, int vn_index);
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