Searched refs:vm_index (Results 1 - 8 of 8) sorted by relevance
| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | assembler-arm64.h | 974 int vm_index);
978 int vm_index);
982 int vm_index);
986 int vm_index);
990 int vm_index);
994 int vm_index);
998 int vm_index);
1002 int vm_index);
1006 int vm_index);
1010 int vm_index);
[all...] |
| H A D | assembler-arm64.cc | 3260 const VRegister& vm, int vm_index, in NEONFPByElement()
3266 DCHECK((vm.Is1S() && (vm_index < 4)) || (vm.Is1D() && (vm_index < 2))); in NEONFPByElement()
3274 Emit(FPFormat(vd) | op | ImmNEONHLM(vm_index, index_num_bits) | Rm(vm) | in NEONFPByElement()
3279 const VRegister& vm, int vm_index, in NEONByElement()
3285 DCHECK((vm.Is1H() && (vm.code() < 16) && (vm_index < 8)) || in NEONByElement()
3286 (vm.Is1S() && (vm_index < 4))); in NEONByElement()
3296 Emit(format | op | ImmNEONHLM(vm_index, index_num_bits) | Rm(vm) | Rn(vn) | in NEONByElement()
3301 const VRegister& vm, int vm_index, in NEONByElementL()
3310 DCHECK((vm.Is1H() && (vm.code() < 16) && (vm_index < in NEONByElementL()
3259 NEONFPByElement(const VRegister& vd, const VRegister& vn, const VRegister& vm, int vm_index, NEONByIndexedElementOp vop) NEONFPByElement() argument
3278 NEONByElement(const VRegister& vd, const VRegister& vn, const VRegister& vm, int vm_index, NEONByIndexedElementOp vop) NEONByElement() argument
3300 NEONByElementL(const VRegister& vd, const VRegister& vn, const VRegister& vm, int vm_index, NEONByIndexedElementOp vop) NEONByElementL() argument
[all...] |
| H A D | macro-assembler-arm64.h | 245 int vm_index) { \
247 ASM(vd, vn, vm, vm_index); \
|
| /third_party/vixl/src/aarch64/ |
| H A D | assembler-aarch64.h | 2554 int vm_index);
2560 int vm_index);
2566 int vm_index);
2572 int vm_index);
2578 int vm_index);
2584 int vm_index);
2590 int vm_index);
2596 int vm_index);
2602 int vm_index);
2608 int vm_index);
[all...] |
| H A D | assembler-aarch64.cc | 4472 int vm_index,
4481 ImmNEONHLM(vm_index, index_num_bits) | ImmRotFcmlaSca(rot) | Rn(vn) |
4600 int vm_index,
4608 VIXL_ASSERT((vm.Is1S() && (vm_index < 4)) || (vm.Is1D() && (vm_index < 2)) ||
4609 (vm.Is1H() && (vm.GetCode() < 16) && (vm_index < 8)));
4632 Emit(op | ImmNEONHLM(vm_index, index_num_bits) | Rm(vm) | Rn(vn) | Rd(vd));
4639 int vm_index,
4645 VIXL_ASSERT((vm.Is1H() && (vm.GetCode() < 16) && (vm_index < 8)) ||
4646 (vm.Is1S() && (vm_index <
[all...] |
| H A D | disasm-aarch64.cc | 6790 uint32_t vm_index = instr->GetNEONH() << 2; in Disassembler() local
6791 vm_index |= instr->GetNEONL() << 1; in Disassembler()
6792 vm_index |= instr->GetNEONM(); in Disassembler()
6800 vm_index >>= instr->GetNEONSize(); in Disassembler()
6808 vm_index >>= 1; in Disassembler()
6811 vm_index >>= 2; in Disassembler()
6814 AppendToOutput("%d", vm_index); in Disassembler()
|
| H A D | macro-assembler-aarch64.h | 3149 int vm_index) { \
3152 ASM(vd, vn, vm, vm_index); \
3320 int vm_index, in Fcmla()
3324 fcmla(vd, vn, vm, vm_index, rot); in Fcmla()
3317 Fcmla(const VRegister& vd, const VRegister& vn, const VRegister& vm, int vm_index, int rot) Fcmla() argument
|
| /third_party/vixl/test/aarch64/ |
| H A D | test-simulator-aarch64.cc | 215 int vm_index);
|
Completed in 64 milliseconds