| /third_party/ffmpeg/libavresample/arm/ |
| H A D | resample_neon.S | 352 vdiv.f32 s2, s2, s1 /* / c->src_incr */
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| /third_party/node/deps/v8/src/diagnostics/arm/ |
| H A D | disasm-arm.cc | 1424 // Dd = vdiv(Dn, Dm)
1425 // Sd = vdiv(Sn, Sm)
1536 Format(instr, "vdiv'cond.f64 'Dd, 'Dn, 'Dm"); in DecodeTypeVFP()
1538 Format(instr, "vdiv'cond.f32 'Sd, 'Sn, 'Sm"); in DecodeTypeVFP()
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| /third_party/node/deps/v8/src/compiler/backend/arm/ |
| H A D | code-generator-arm.cc | 1329 __ vdiv(i.OutputFloatRegister(), i.InputFloatRegister(0), in AssembleArchInstruction()
1380 __ vdiv(i.OutputDoubleRegister(), i.InputDoubleRegister(0), in AssembleArchInstruction()
1863 ASSEMBLE_F64X2_ARITHMETIC_BINOP(vdiv); in AssembleArchInstruction()
2240 __ vdiv(S_FROM_Q(dst, 0), S_FROM_Q(src1, 0), S_FROM_Q(src2, 0)); in AssembleArchInstruction()
2241 __ vdiv(S_FROM_Q(dst, 1), S_FROM_Q(src1, 1), S_FROM_Q(src2, 1)); in AssembleArchInstruction()
2242 __ vdiv(S_FROM_Q(dst, 2), S_FROM_Q(src1, 2), S_FROM_Q(src2, 2)); in AssembleArchInstruction()
2243 __ vdiv(S_FROM_Q(dst, 3), S_FROM_Q(src1, 3), S_FROM_Q(src2, 3)); in AssembleArchInstruction()
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| /third_party/node/deps/v8/src/wasm/baseline/arm/ |
| H A D | liftoff-assembler-arm.h | 1560 FP32_BINOP(f32_div, vdiv)
1567 FP64_BINOP(f64_div, vdiv)
2569 vdiv(dst.low_fp(), lhs.low_fp(), rhs.low_fp()); in emit_f64x2_div()
2570 vdiv(dst.high_fp(), lhs.high_fp(), rhs.high_fp()); in emit_f64x2_div()
2772 vdiv(dst_low.low(), lhs_low.low(), rhs_low.low()); in emit_f32x4_div()
2773 vdiv(dst_low.high(), lhs_low.high(), rhs_low.high()); in emit_f32x4_div()
2774 vdiv(dst_high.low(), lhs_high.low(), rhs_high.low()); in emit_f32x4_div()
2775 vdiv(dst_high.high(), lhs_high.high(), rhs_high.high()); in emit_f32x4_div()
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| /third_party/node/deps/v8/src/codegen/arm/ |
| H A D | assembler-arm.h | 796 void vdiv(const DwVfpRegister dst, const DwVfpRegister src1,
798 void vdiv(const SwVfpRegister dst, const SwVfpRegister src1,
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| H A D | assembler-arm.cc | 3363 void Assembler::vdiv(const DwVfpRegister dst, const DwVfpRegister src1, in vdiv() function in v8::internal::Assembler
3365 // Dd = vdiv(Dn, Dm) double precision floating point division. in vdiv()
3383 void Assembler::vdiv(const SwVfpRegister dst, const SwVfpRegister src1, in vdiv() function in v8::internal::Assembler
3385 // Sd = vdiv(Sn, Sm) single precision floating point division. in vdiv()
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| /third_party/node/deps/v8/src/codegen/riscv64/ |
| H A D | assembler-riscv64.h | 804 DEFINE_OPMVX(vdiv, VDIV_FUNCT6)
810 DEFINE_OPMVV(vdiv, VDIV_FUNCT6)
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| H A D | assembler-riscv64.cc | 2677 DEFINE_OPMVX(vdiv, VDIV_FUNCT6)
2683 DEFINE_OPMVV(vdiv, VDIV_FUNCT6)
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| /third_party/vixl/src/aarch32/ |
| H A D | assembler-aarch32.h | 4383 void vdiv(
4385 void vdiv(DataType dt, SRegister rd, SRegister rn, SRegister rm) { in vdiv() function in vixl::aarch32::Assembler
4386 vdiv(al, dt, rd, rn, rm); in vdiv()
4389 void vdiv(
4391 void vdiv(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vdiv() function in vixl::aarch32::Assembler
4392 vdiv(al, dt, rd, rn, rm); in vdiv()
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| H A D | disasm-aarch32.h | 1786 void vdiv(
1789 void vdiv(
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| H A D | assembler-aarch32.cc | 17279 void Assembler::vdiv( in vdiv() function in vixl::aarch32::Assembler
17299 Delegate(kVdiv, &Assembler::vdiv, cond, dt, rd, rn, rm); in vdiv()
17302 void Assembler::vdiv( in vdiv() function in vixl::aarch32::Assembler
17322 Delegate(kVdiv, &Assembler::vdiv, cond, dt, rd, rn, rm); in vdiv()
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| H A D | disasm-aarch32.cc | 4675 void Disassembler::vdiv( in vdiv() function in vixl::aarch32::Disassembler
4686 void Disassembler::vdiv( in vdiv() function in vixl::aarch32::Disassembler
[all...] |
| H A D | macro-assembler-aarch32.h | 8146 vdiv(cond, dt, rd, rn, rm); in MacroAssembler()
8165 vdiv(cond, dt, rd, rn, rm); in MacroAssembler()
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| /third_party/astc-encoder/Source/UnitTest/ |
| H A D | test_simd.cpp | 502 TEST(vfloat4, vdiv) in TEST()
2214 TEST(vfloat8, vdiv) in TEST()
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