| /third_party/skia/third_party/externals/freetype/src/otvalid/ |
| H A D | otvmath.c | 319 FT_UInt vcnt, table_size; in otv_MathGlyphConstruction_validate() local
330 vcnt = FT_NEXT_USHORT( p ); in otv_MathGlyphConstruction_validate()
332 OTV_LIMIT_CHECK( 4 * vcnt ); in otv_MathGlyphConstruction_validate()
333 table_size = 4 + 4 * vcnt; in otv_MathGlyphConstruction_validate()
335 for ( i = 0; i < vcnt; i++ ) in otv_MathGlyphConstruction_validate()
359 FT_UInt vcnt, hcnt, i, table_size; in otv_MathVariants_validate() local
373 vcnt = FT_NEXT_USHORT( p ); in otv_MathVariants_validate()
376 OTV_LIMIT_CHECK( 2 * vcnt + 2 * hcnt ); in otv_MathVariants_validate()
377 table_size = 10 + 2 * vcnt + 2 * hcnt; in otv_MathVariants_validate()
381 otv_Coverage_validate( table + VCoverage, otvalid, (FT_Int)vcnt ); in otv_MathVariants_validate()
[all...] |
| /third_party/ltp/testcases/kernel/io/direct_io/ |
| H A D | diotest_routines.c | 65 void vfillbuf(struct iovec *iv, int vcnt, char value) in vfillbuf() argument
69 for (i = 0; i < vcnt; iv++, i++) { in vfillbuf()
93 int vbufcmp(struct iovec *iv1, struct iovec *iv2, int vcnt) in vbufcmp() argument
97 for (i = 0; i < vcnt; iv1++, iv2++, i++) { in vbufcmp()
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| /third_party/ffmpeg/libavfilter/ |
| H A D | vf_colorcorrect.c | 213 unsigned ucnt = 0, vcnt = 0; in median_8() local
237 vcnt += vhistogram[i]; in median_8()
238 if (vcnt >= half_size) { in median_8()
267 unsigned ucnt = 0, vcnt = 0; in median_16() local
291 vcnt += vhistogram[i]; in median_16()
292 if (vcnt >= half_size) { in median_16()
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| /third_party/nghttp2/src/ |
| H A D | h2load_quic.cc | 681 auto vcnt = static_cast<size_t>(sveccnt); in write_quic() local
690 flags, stream_id, reinterpret_cast<const ngtcp2_vec *>(v), vcnt, ts); in write_quic()
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| H A D | shrpx_http3_upstream.cc | 835 auto vcnt = static_cast<size_t>(sveccnt); in write_streams() local
844 stream_id, reinterpret_cast<const ngtcp2_vec *>(v), vcnt, ts); in write_streams()
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| /third_party/node/deps/v8/src/diagnostics/arm/ |
| H A D | disasm-arm.cc | 2278 Format(instr, q ? "vcnt.8 'Qd, 'Qm" : "vcnt.8 'Dd, 'Dm"); in DecodeAdvancedSIMDTwoOrThreeRegisters()
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| /third_party/vixl/src/aarch32/ |
| H A D | assembler-aarch32.h | 4222 void vcnt(Condition cond, DataType dt, DRegister rd, DRegister rm);
4223 void vcnt(DataType dt, DRegister rd, DRegister rm) { vcnt(al, dt, rd, rm); } in vcnt() function in vixl::aarch32::Assembler
4225 void vcnt(Condition cond, DataType dt, QRegister rd, QRegister rm);
4226 void vcnt(DataType dt, QRegister rd, QRegister rm) { vcnt(al, dt, rd, rm); } in vcnt() function in vixl::aarch32::Assembler
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| H A D | disasm-aarch32.h | 1684 void vcnt(Condition cond, DataType dt, DRegister rd, DRegister rm);
1686 void vcnt(Condition cond, DataType dt, QRegister rd, QRegister rm);
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| H A D | assembler-aarch32.cc | 16179 void Assembler::vcnt(Condition cond, DataType dt, DRegister rd, DRegister rm) { in vcnt() function in vixl::aarch32::Assembler
16200 Delegate(kVcnt, &Assembler::vcnt, cond, dt, rd, rm); in vcnt()
16203 void Assembler::vcnt(Condition cond, DataType dt, QRegister rd, QRegister rm) { in vcnt() function in vixl::aarch32::Assembler
16224 Delegate(kVcnt, &Assembler::vcnt, cond, dt, rd, rm); in vcnt()
|
| H A D | disasm-aarch32.cc | 4391 void Disassembler::vcnt(Condition cond, in vcnt() function in vixl::aarch32::Disassembler
4400 void Disassembler::vcnt(Condition cond, in vcnt() function in vixl::aarch32::Disassembler
[all...] |
| H A D | macro-assembler-aarch32.h | 7631 vcnt(cond, dt, rd, rm); in MacroAssembler()
7646 vcnt(cond, dt, rd, rm); in MacroAssembler()
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| /third_party/node/deps/v8/src/codegen/arm/ |
| H A D | assembler-arm.h | 986 void vcnt(QwNeonRegister dst, QwNeonRegister src);
|
| H A D | assembler-arm.cc | 5061 void Assembler::vcnt(QwNeonRegister dst, QwNeonRegister src) { in vcnt() function in v8::internal::Assembler
5062 // Qd = vcnt(Qm) SIMD Vector Count Set Bits. in vcnt()
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| /third_party/node/deps/v8/src/compiler/backend/arm/ |
| H A D | code-generator-arm.cc | 1593 __ vcnt(i.OutputSimd128Register(), i.InputSimd128Register(0)); in AssembleArchInstruction()
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| /third_party/node/deps/v8/src/wasm/baseline/arm/ |
| H A D | liftoff-assembler-arm.h | 3502 vcnt(liftoff::GetSimd128Register(dst), liftoff::GetSimd128Register(src));
|