| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| H A D | X86TargetTransformInfo.cpp | 392 { ISD::SDIV, MVT::v8i32, 15 }, // vpmuldq sequence in getArithmeticInstrCost()
393 { ISD::SREM, MVT::v8i32, 19 }, // vpmuldq+mul+sub sequence in getArithmeticInstrCost()
394 { ISD::UDIV, MVT::v8i32, 15 }, // vpmuludq sequence in getArithmeticInstrCost()
395 { ISD::UREM, MVT::v8i32, 19 }, // vpmuludq+mul+sub sequence in getArithmeticInstrCost()
422 { ISD::SDIV, MVT::v8i32, 38+2 }, // 2*pmuludq sequence + split. in getArithmeticInstrCost()
423 { ISD::SREM, MVT::v8i32, 48+2 }, // 2*pmuludq+mul+sub sequence + split. in getArithmeticInstrCost()
426 { ISD::UDIV, MVT::v8i32, 30+2 }, // 2*pmuludq sequence + split. in getArithmeticInstrCost()
427 { ISD::UREM, MVT::v8i32, 40+2 }, // 2*pmuludq+mul+sub sequence + split. in getArithmeticInstrCost()
436 if (ISD == ISD::SDIV && LT.second == MVT::v8i32 && ST->hasAVX()) in getArithmeticInstrCost()
438 if (ISD == ISD::SREM && LT.second == MVT::v8i32 in getArithmeticInstrCost()
[all...] |
| H A D | X86ISelLowering.cpp | 1134 MVT::v32i8, MVT::v16i16, MVT::v8i32, MVT::v4i64 }) in X86TargetLowering()
1142 MVT::v32i8, MVT::v16i16, MVT::v8i32, MVT::v4i64 }) in X86TargetLowering()
1153 addRegisterClass(MVT::v8i32, Subtarget.hasVLX() ? &X86::VR256XRegClass in X86TargetLowering()
1180 setOperationPromotedToType(ISD::FP_TO_SINT, MVT::v8i16, MVT::v8i32); in X86TargetLowering()
1181 setOperationPromotedToType(ISD::FP_TO_UINT, MVT::v8i16, MVT::v8i32); in X86TargetLowering()
1182 setOperationPromotedToType(ISD::STRICT_FP_TO_SINT, MVT::v8i16, MVT::v8i32); in X86TargetLowering()
1183 setOperationPromotedToType(ISD::STRICT_FP_TO_UINT, MVT::v8i16, MVT::v8i32); in X86TargetLowering()
1184 setOperationAction(ISD::FP_TO_SINT, MVT::v8i32, Legal); in X86TargetLowering()
1185 setOperationAction(ISD::STRICT_FP_TO_SINT, MVT::v8i32, Legal); in X86TargetLowering()
1187 setOperationAction(ISD::SINT_TO_FP, MVT::v8i32, Lega in X86TargetLowering()
[all...] |
| H A D | X86ISelDAGToDAG.cpp | 4033 case MVT::v8i32: in getVPTESTMOpc()
4055 case MVT::v8i32: in getVPTESTMOpc()
4080 case MVT::v8i32: in getVPTESTMOpc()
4110 case MVT::v8i32: in getVPTESTMOpc()
4132 case MVT::v8i32: in getVPTESTMOpc()
4157 case MVT::v8i32: in getVPTESTMOpc()
|
| H A D | X86FastISel.cpp | 426 case MVT::v8i32: in X86FastEmitLoad()
599 case MVT::v8i32: in X86FastEmitStore()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Support/ |
| H A D | MachineValueType.h | 97 v8i32 = 48, // 8 x i32
361 SimpleTy == MVT::v16i16 || SimpleTy == MVT::v8i32 || in is256BitVector()
480 case v8i32: in getVectorElementType()
601 case v8i32: in getVectorNumElements()
779 case v8i32: in getSizeInBits()
963 if (NumElements == 8) return MVT::v8i32; in getVectorVT()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| H A D | AArch64TargetTransformInfo.cpp | 304 { ISD::TRUNCATE, MVT::v8i8, MVT::v8i32, 3 }, in getCastInstrCost()
312 { ISD::SIGN_EXTEND, MVT::v8i32, MVT::v8i8, 3 }, in getCastInstrCost()
313 { ISD::ZERO_EXTEND, MVT::v8i32, MVT::v8i8, 3 }, in getCastInstrCost()
314 { ISD::SIGN_EXTEND, MVT::v8i32, MVT::v8i16, 2 }, in getCastInstrCost()
315 { ISD::ZERO_EXTEND, MVT::v8i32, MVT::v8i16, 2 }, in getCastInstrCost()
610 { ISD::SELECT, MVT::v8i1, MVT::v8i32, 8 }, in getCmpSelInstrCost()
|
| H A D | AArch64ISelLowering.cpp | 744 setOperationPromotedToType(ISD::SINT_TO_FP, MVT::v8i8, MVT::v8i32); in AArch64TargetLowering()
745 setOperationPromotedToType(ISD::UINT_TO_FP, MVT::v8i8, MVT::v8i32); in AArch64TargetLowering()
766 setOperationPromotedToType(ISD::SINT_TO_FP, MVT::v8i16, MVT::v8i32); in AArch64TargetLowering()
767 setOperationPromotedToType(ISD::UINT_TO_FP, MVT::v8i16, MVT::v8i32); in AArch64TargetLowering()
11133 // %result = v8i32 sext v8i8 %value in performExtendCombine()
11147 // the normal splitting to happen for the v8i16->v8i32. in performExtendCombine()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| H A D | ARMTargetTransformInfo.cpp | 229 { ISD::SIGN_EXTEND, MVT::v8i32, MVT::v8i8, 3 }, in getCastInstrCost()
230 { ISD::ZERO_EXTEND, MVT::v8i32, MVT::v8i8, 3 }, in getCastInstrCost()
240 { ISD::TRUNCATE, MVT::v8i8, MVT::v8i32, 3 }, in getCastInstrCost()
260 { ISD::SINT_TO_FP, MVT::v8f32, MVT::v8i32, 2 }, in getCastInstrCost()
261 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i32, 2 }, in getCastInstrCost()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| H A D | ValueTypes.cpp | 193 case MVT::v8i32: return VectorType::get(Type::getInt32Ty(Context), 8); in getTypeForEVT()
|
| /third_party/mesa3d/src/amd/llvm/ |
| H A D | ac_llvm_build.h | 94 LLVMTypeRef v8i32; member
|
| H A D | ac_llvm_build.c | 99 ctx->v8i32 = LLVMVectorType(ctx->i32, 8); in ac_llvm_context_init()
3118 tmp = LLVMBuildBitCast(ac->builder, fmask, ac->v8i32, ""); in ac_apply_fmask_to_sample()
4516 ptr_type = ctx->v8i32; in arg_llvm_type()
|
| H A D | ac_nir_to_llvm.c | 4731 res = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, ""); in visit_tex()
4987 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, ""); in visit_tex()
|
| /third_party/mesa3d/src/amd/vulkan/ |
| H A D | radv_nir_to_llvm.c | 340 LLVMValueRef descriptor1 = radv_load_rsrc(ctx, plane1_addr, ctx->ac.v8i32); in radv_get_sampler_desc()
353 return radv_load_rsrc(ctx, index, v4 ? ctx->ac.v4i32 : ctx->ac.v8i32); in radv_get_sampler_desc()
|
| /third_party/mesa3d/src/gallium/drivers/radeonsi/ |
| H A D | si_shader_llvm_ps.c | 70 LLVMBuildPointerCast(ctx->ac.builder, ptr, ac_array_in_const32_addr_space(ctx->ac.v8i32), ""); in si_nir_emit_fbfetch()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 144 addRegisterClass(MVT::v8i32, &AMDGPU::SReg_256RegClass); in SITargetLowering()
180 setOperationAction(ISD::LOAD, MVT::v8i32, Custom); in SITargetLowering()
189 setOperationAction(ISD::STORE, MVT::v8i32, Custom); in SITargetLowering()
197 setTruncStoreAction(MVT::v8i32, MVT::v8i16, Expand); in SITargetLowering()
202 setTruncStoreAction(MVT::v8i32, MVT::v8i8, Expand); in SITargetLowering()
261 for (MVT VT : { MVT::v8i32, MVT::v8f32, MVT::v16i32, MVT::v16f32, in SITargetLowering()
307 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v8i32, Expand); in SITargetLowering()
346 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v8i32, Custom); in SITargetLowering()
5735 if (VT == MVT::v8i32 || VT == MVT::v16i32) in lowerSBuffer()
|
| H A D | R600ISelLowering.cpp | 112 setTruncStoreAction(MVT::v8i32, MVT::v8i16, Custom); in R600TargetLowering()
117 setTruncStoreAction(MVT::v8i32, MVT::v8i8, Custom); in R600TargetLowering()
|
| H A D | AMDGPUISelLowering.cpp | 86 AddPromotedToType(ISD::LOAD, MVT::v8f32, MVT::v8i32); in AMDGPUTargetLowering()
186 AddPromotedToType(ISD::STORE, MVT::v8f32, MVT::v8i32); in AMDGPUTargetLowering()
284 setOperationAction(ISD::CONCAT_VECTORS, MVT::v8i32, Custom); in AMDGPUTargetLowering()
295 setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v8i32, Custom); in AMDGPUTargetLowering()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 3648 Info.memVT = MVT::v8i32;
3728 Info.memVT = MVT::v8i32;
|