Searched refs:usubw2 (Results 1 - 16 of 16) sorted by relevance
| /third_party/ffmpeg/libavcodec/aarch64/ |
| H A D | h264dsp_neon.S | 83 usubw2 v20.8H, v20.8H, v16.16B
89 usubw2 v20.8H, v20.8H, v2.16B
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| H A D | vp9lpf_neon.S | 78 usubw2 \dst2, \in2, \in3\().16b
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| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | assembler-arm64.h | 1309 void usubw2(const VRegister& vd, const VRegister& vn, const VRegister& vm);
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| H A D | macro-assembler-arm64.h | 477 V(usubw2, Usubw2) \
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| H A D | assembler-arm64.cc | 1849 void Assembler::usubw2(const VRegister& vd, const VRegister& vn, in usubw2() function in v8::internal::Assembler
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| /third_party/vixl/test/aarch64/ |
| H A D | test-trace-aarch64.cc | 2478 __ usubw2(v18.V2D(), v29.V2D(), v6.V4S()); in GenerateTestSequenceNEON()
2479 __ usubw2(v6.V4S(), v6.V4S(), v20.V8H()); in GenerateTestSequenceNEON()
2480 __ usubw2(v18.V8H(), v4.V8H(), v16.V16B()); in GenerateTestSequenceNEON()
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| H A D | test-cpu-features-aarch64.cc | 2741 TEST_NEON(usubw2_0, usubw2(v0.V8H(), v1.V8H(), v2.V16B()))
2742 TEST_NEON(usubw2_1, usubw2(v0.V4S(), v1.V4S(), v2.V8H()))
2743 TEST_NEON(usubw2_2, usubw2(v0.V2D(), v1.V2D(), v2.V4S()))
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| /third_party/node/deps/v8/src/execution/arm64/ |
| H A D | simulator-arm64.h | 1847 LogicVRegister usubw2(VectorFormat vform, LogicVRegister dst,
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| H A D | simulator-arm64.cc | 4567 usubw2(vf_l, rd, rn, rm);
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| H A D | simulator-logic-arm64.cc | 2426 LogicVRegister Simulator::usubw2(VectorFormat vform, LogicVRegister dst, in usubw2() function in v8::internal::Simulator
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| /third_party/vixl/src/aarch64/ |
| H A D | simulator-aarch64.h | 4047 LogicVRegister usubw2(VectorFormat vform,
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| H A D | assembler-aarch64.h | 3168 void usubw2(const VRegister& vd, const VRegister& vn, const VRegister& vm);
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| H A D | assembler-aarch64.cc | 3081 void Assembler::usubw2(const VRegister& vd,
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| H A D | logic-aarch64.cc | 3607 LogicVRegister Simulator::usubw2(VectorFormat vform,
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| H A D | macro-assembler-aarch64.h | 2980 V(usubw2, Usubw2) \
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| H A D | simulator-aarch64.cc | 7831 usubw2(vf_l, rd, rn, rm); in Simulator()
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