| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | assembler-arm64.h | 1913 void ursqrte(const VRegister& vd, const VRegister& vn);
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| H A D | macro-assembler-arm64.h | 321 V(ursqrte, Ursqrte) \
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| H A D | assembler-arm64.cc | 1974 void Assembler::ursqrte(const VRegister& vd, const VRegister& vn) { in ursqrte() function in v8::internal::Assembler
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| /third_party/vixl/test/aarch64/ |
| H A D | test-api-movprfx-aarch64.cc | 2388 __ ursqrte(z4.VnS(), p3.Merging(), z3.VnS()); in TEST()
3563 __ ursqrte(z4.VnS(), p3.Merging(), z4.VnS()); in TEST()
3709 __ ursqrte(z4.VnS(), p3.Merging(), z3.VnS()); in TEST()
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| H A D | test-simulator-aarch64.cc | 4902 DEFINE_TEST_NEON_2SAME_2S_4S(ursqrte, Basic)
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| H A D | test-trace-aarch64.cc | 2418 __ ursqrte(v20.V2S(), v16.V2S()); in GenerateTestSequenceNEON()
2419 __ ursqrte(v28.V4S(), v8.V4S()); in GenerateTestSequenceNEON()
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| H A D | test-cpu-features-aarch64.cc | 2681 TEST_NEON(ursqrte_0, ursqrte(v0.V2S(), v1.V2S()))
2682 TEST_NEON(ursqrte_1, ursqrte(v0.V4S(), v1.V4S()))
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| /third_party/node/deps/v8/src/execution/arm64/ |
| H A D | simulator-arm64.h | 2156 LogicVRegister ursqrte(VectorFormat vform, LogicVRegister dst,
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| H A D | simulator-arm64.cc | 4112 ursqrte(fpf, rd, rn);
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| H A D | simulator-logic-arm64.cc | 4105 LogicVRegister Simulator::ursqrte(VectorFormat vform, LogicVRegister dst, in ursqrte() function in v8::internal::Simulator
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| /third_party/vixl/src/aarch64/ |
| H A D | assembler-aarch64.h | 2971 void ursqrte(const VRegister& vd, const VRegister& vn);
6835 void ursqrte(const ZRegister& zd, const PRegisterM& pg, const ZRegister& zn);
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| H A D | simulator-aarch64.h | 4721 LogicVRegister ursqrte(VectorFormat vform,
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| H A D | macro-assembler-aarch64.h | 3071 V(ursqrte, Ursqrte) \
7527 ursqrte(zd, pg.Merging(), zn); in Ursqrte()
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| H A D | simulator-aarch64.cc | 2473 ursqrte(vform, result, zn); in Simulator()
7160 ursqrte(fpf, rd, rn); in Simulator()
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| H A D | assembler-aarch64.cc | 5269 void Assembler::ursqrte(const VRegister& vd, const VRegister& vn) {
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| H A D | assembler-sve-aarch64.cc | 9564 void Assembler::ursqrte(const ZRegister& zd, in ursqrte() function in vixl::aarch64::Assembler
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| H A D | logic-aarch64.cc | 6352 LogicVRegister Simulator::ursqrte(VectorFormat vform,
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