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Searched refs:urecpe (Results 1 - 17 of 17) sorted by relevance

/third_party/node/deps/v8/src/codegen/arm64/
H A Dassembler-arm64.h1916 void urecpe(const VRegister& vd, const VRegister& vn);
H A Dmacro-assembler-arm64.h320 V(urecpe, Urecpe) \
H A Dassembler-arm64.cc1980 void Assembler::urecpe(const VRegister& vd, const VRegister& vn) { in urecpe() function in v8::internal::Assembler
/third_party/vixl/test/aarch64/
H A Dtest-api-movprfx-aarch64.cc2373 __ urecpe(z25.VnS(), p7.Merging(), z2.VnS()); in TEST()
3551 __ urecpe(z25.VnS(), p7.Merging(), z25.VnS()); in TEST()
3694 __ urecpe(z25.VnS(), p7.Merging(), z2.VnS()); in TEST()
H A Dtest-simulator-aarch64.cc4869 DEFINE_TEST_NEON_2SAME_2S_4S(urecpe, Basic)
H A Dtest-trace-aarch64.cc2394 __ urecpe(v23.V2S(), v15.V2S()); in GenerateTestSequenceNEON()
2395 __ urecpe(v27.V4S(), v7.V4S()); in GenerateTestSequenceNEON()
H A Dtest-cpu-features-aarch64.cc2657 TEST_NEON(urecpe_0, urecpe(v0.V2S(), v1.V2S()))
2658 TEST_NEON(urecpe_1, urecpe(v0.V4S(), v1.V4S()))
/third_party/node/deps/v8/src/execution/arm64/
H A Dsimulator-arm64.h2158 LogicVRegister urecpe(VectorFormat vform, LogicVRegister dst,
H A Dsimulator-arm64.cc4115 urecpe(fpf, rd, rn);
H A Dsimulator-logic-arm64.cc4135 LogicVRegister Simulator::urecpe(VectorFormat vform, LogicVRegister dst, in urecpe() function in v8::internal::Simulator
/third_party/vixl/src/aarch64/
H A Dassembler-aarch64.h2974 void urecpe(const VRegister& vd, const VRegister& vn);
6808 void urecpe(const ZRegister& zd, const PRegisterM& pg, const ZRegister& zn);
H A Dsimulator-aarch64.h4724 LogicVRegister urecpe(VectorFormat vform,
H A Dmacro-assembler-aarch64.h3070 V(urecpe, Urecpe) \
7510 urecpe(zd, pg.Merging(), zn); in Urecpe()
H A Dsimulator-aarch64.cc2470 urecpe(vform, result, zn); in Simulator()
7163 urecpe(fpf, rd, rn); in Simulator()
H A Dassembler-aarch64.cc5277 void Assembler::urecpe(const VRegister& vd, const VRegister& vn) {
H A Dassembler-sve-aarch64.cc9484 void Assembler::urecpe(const ZRegister& zd, in urecpe() function in vixl::aarch64::Assembler
H A Dlogic-aarch64.cc6385 LogicVRegister Simulator::urecpe(VectorFormat vform,

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