H A D | assembler-riscv64.cc | 1079 Register rs1, uint8_t uimm5) { in GenInstrCL() 1081 is_uint5(uimm5)); in GenInstrCL() 1082 ShortInstr instr = opcode | ((uimm5 & 0x3) << 5) | in GenInstrCL() 1084 ((uimm5 & 0x1c) << 8) | (funct3 << kRvcFunct3Shift) | in GenInstrCL() 1090 Register rs1, uint8_t uimm5) { in GenInstrCL() 1092 is_uint5(uimm5)); in GenInstrCL() 1093 ShortInstr instr = opcode | ((uimm5 & 0x3) << 5) | in GenInstrCL() 1095 ((uimm5 & 0x1c) << 8) | (funct3 << kRvcFunct3Shift) | in GenInstrCL() 1106 Register rs1, uint8_t uimm5) { in GenInstrCS() 1108 is_uint5(uimm5)); in GenInstrCS() 1078 GenInstrCL(uint8_t funct3, Opcode opcode, Register rd, Register rs1, uint8_t uimm5) GenInstrCL() argument 1089 GenInstrCL(uint8_t funct3, Opcode opcode, FPURegister rd, Register rs1, uint8_t uimm5) GenInstrCL() argument 1105 GenInstrCS(uint8_t funct3, Opcode opcode, Register rs2, Register rs1, uint8_t uimm5) GenInstrCS() argument 1116 GenInstrCS(uint8_t funct3, Opcode opcode, FPURegister rs2, Register rs1, uint8_t uimm5) GenInstrCS() argument 2367 uint8_t uimm5 = c_lw() local 2376 uint8_t uimm5 = ((uimm8 & 0x38) >> 1) | ((uimm8 & 0xc0) >> 6); c_ld() local 2384 uint8_t uimm5 = ((uimm8 & 0x38) >> 1) | ((uimm8 & 0xc0) >> 6); c_fld() local 2394 uint8_t uimm5 = c_sw() local 2403 uint8_t uimm5 = ((uimm8 & 0x38) >> 1) | ((uimm8 & 0xc0) >> 6); c_sd() local 2411 uint8_t uimm5 = ((uimm8 & 0x38) >> 1) | ((uimm8 & 0xc0) >> 6); c_fsd() local [all...] |