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Searched refs:systemclock (Results 1 - 3 of 3) sorted by relevance

/third_party/backends/backend/
H A Dhp3900_types.c524 SANE_Byte systemclock; member
545 SANE_Byte systemclock; member
H A Dhp3900_debug.c252 reg->motorcurve, reg->samplerate, reg->systemclock, in dbg_scanmodes()
405 a, reg->systemclock, reg->ctpc, in dbg_motormoves()
816 DBG(DBG_FNC, " bit[0..3] = systemclock: 0x%02x\n", iValue & 0x0f); in dbg_registers()
H A Dhp3900_rts8822.c2628 mymotor.systemclock = default_gain_offset->edcg2[1]; /*? */ in Head_ParkHome()
2738 /* set systemclock */ in Motor_Move()
2739 data_bitset (&cpRegs[0x00], 0x0f, mymotor->systemclock); /*----xxxx*/ in Motor_Move()
3577 /* systemclock */ in Init_USBData()
5172 /* select case systemclock */ in SetMultiExposure()
9094 /* set systemclock */ in RTS_Setup()
9095 data_bitset (&Regs[0x00], 0x0f, sm->systemclock); in RTS_Setup()

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