/third_party/ffmpeg/libswscale/aarch64/ |
H A D | rgb2rgb_neon.S | 72 add x0, x0, w5, sxtw 73 add x1, x1, w6, sxtw 74 add x2, x2, w7, sxtw
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/third_party/ffmpeg/libavcodec/aarch64/ |
H A D | sbrdsp_neon.S | 178 sxtw x4, w4 179 sxtw x5, w5 214 sxtw x3, w3 215 sxtw x4, w4 274 sxtw x3, w3 275 sxtw x5, w5
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H A D | vp8dsp_neon.S | 853 sxtw x4, w4 854 sxtw x6, w6 881 sxtw x5, w5 // x 904 sxtw x5, w5 // x 909 sxtw x4, w4 921 sxtw x6, w6 995 sxtw x4, w4 999 sxtw x5, w5 1016 sxtw x6, w6 1083 sxtw x [all...] |
H A D | h264idct_neon.S | 29 sxtw x2, w2 84 sxtw x2, w2 273 sxtw x2, w2 338 sxtw x2, w2
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H A D | synth_filter_neon.S | 48 sxtw x7, w7
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H A D | vc1dsp_neon.S | 713 sub x3, x0, w1, sxtw #2 858 sub x3, x0, w1, sxtw #2 1043 sub x3, x0, w1, sxtw #2
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/third_party/ffmpeg/libavutil/aarch64/ |
H A D | float_dsp_neon.S | 104 sxtw x4, w4 // len 158 sxtw x3, w3
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/third_party/ffmpeg/libavresample/aarch64/ |
H A D | resample_neon.S | 32 sxtw x2, w2
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/third_party/node/deps/v8/src/codegen/arm64/ |
H A D | macro-assembler-arm64-inl.h | 974 sxtw(rd, rn); in Sxtw()
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H A D | assembler-arm64.h | 644 void sxtw(const Register& rd, const Register& rn) { sbfm(rd, rn, 0, 31); }
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/third_party/vixl/test/aarch64/ |
H A D | test-api-movprfx-aarch64.cc | 280 __ sxtw(z21.VnD(), p0.Merging(), z21.VnD()); in TEST() 840 __ sxtw(z1.VnD(), p2.Merging(), z21.VnD()); in TEST() 1618 __ sxtw(z26.VnD(), p5.Merging(), z4.VnD()); in TEST()
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H A D | test-disasm-aarch64.cc | 64 COMPARE(dci(0x93407c00), "sxtw x0, w0"); in TEST() 102 "sxtw x0, w1\n" in TEST() 105 "sxtw x0, w0\n" in TEST() 340 COMPARE(add(x24, x25, Operand(x26, SXTW, 1)), "add x24, x25, w26, sxtw #1"); in TEST() 366 COMPARE(sub(x24, x25, Operand(x26, SXTW, 1)), "sub x24, x25, w26, sxtw #1"); in TEST() 532 COMPARE(sxtw(x8, x9), "sxtw x8, w9"); in TEST() 535 COMPARE(sxtw(x4, w5), "sxtw x4, w5"); in TEST() 1106 COMPARE(ldr(w12, MemOperand(x13, w14, SXTW)), "ldr w12, [x13, w14, sxtw]"); in TEST() [all...] |
H A D | test-trace-aarch64.cc | 353 __ sxtw(w16, w17); in GenerateTestSequenceBase() 354 __ sxtw(x18, x19); in GenerateTestSequenceBase()
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H A D | test-cpu-features-aarch64.cc | 501 TEST_NONE(sxtw_0, sxtw(x0, w1))
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H A D | test-disasm-sve-aarch64.cc | 130 "adr z19.d, [z22.d, z11.d, sxtw]"); in TEST() 132 "adr z19.d, [z22.d, z11.d, sxtw #1]"); in TEST() 134 "adr z19.d, [z22.d, z11.d, sxtw #2]"); in TEST() 136 "adr z19.d, [z22.d, z11.d, sxtw #3]"); in TEST() 2991 COMPARE(sxtw(z13.VnD(), p3.Merging(), z27.VnD()), "sxtw z13.d, p3/m, z27.d"); in TEST() 3003 COMPARE(dci(0x0414a000), "unallocated (Unallocated)"); // sxtw b in TEST() 3004 COMPARE(dci(0x0454a000), "unallocated (Unallocated)"); // sxtw h in TEST() 3005 COMPARE(dci(0x0494a000), "unallocated (Unallocated)"); // sxtw s in TEST() 3410 "ld1b {z9.s}, p5/z, [x2, z1.s, sxtw]"); in TEST() [all...] |
/third_party/node/deps/v8/src/wasm/baseline/arm64/ |
H A D | liftoff-assembler-arm64.h | 1551 sxtw(dst.gp(), src.gp()); in emit_i64_signextend_i32()
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/third_party/vixl/src/aarch64/ |
H A D | assembler-aarch64.h | 848 void sxtw(const Register& rd, const Register& rn) { sbfm(rd, rn, 0, 31); } in sxtw() function in vixl::aarch64::Assembler 5665 void sxtw(const ZRegister& zd, const PRegisterM& pg, const ZRegister& zn);
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H A D | macro-assembler-aarch64.h | 2625 sxtw(rd, rn); in Sxtw() 6230 sxtw(zd, pg, zn); in Sxtw()
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H A D | assembler-sve-aarch64.cc | 3500 void Assembler::sxtw(const ZRegister& zd, in sxtw() function in vixl::aarch64::Assembler 4705 // [x0, z0.s, sxtw] in SVEPrefetchHelper()
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/third_party/node/deps/v8/src/builtins/arm64/ |
H A D | builtins-arm64.cc | 3019 __ sxtw(kWasmCompileLazyFuncIndexRegister, in Generate_WasmCompileLazy()
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