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Searched refs:sub_cmd (Results 1 - 12 of 12) sorted by relevance

/third_party/mesa3d/src/imagination/vulkan/
H A Dpvr_job_compute.c39 struct pvr_sub_cmd_compute *sub_cmd, in pvr_compute_job_ws_submit_info_init()
46 uint32_t shared_regs = sub_cmd->num_shared_regs; in pvr_compute_job_ws_submit_info_init()
89 struct pvr_sub_cmd_compute *sub_cmd, in pvr_compute_job_submit()
98 sub_cmd, in pvr_compute_job_submit()
102 &sub_cmd->submit_info); in pvr_compute_job_submit()
105 &sub_cmd->submit_info, in pvr_compute_job_submit()
37 pvr_compute_job_ws_submit_info_init( struct pvr_compute_ctx *ctx, struct pvr_sub_cmd_compute *sub_cmd, struct vk_sync **waits, uint32_t wait_count, uint32_t *stage_flags, struct pvr_winsys_compute_submit_info *submit_info) pvr_compute_job_ws_submit_info_init() argument
88 pvr_compute_job_submit(struct pvr_compute_ctx *ctx, struct pvr_sub_cmd_compute *sub_cmd, struct vk_sync **waits, uint32_t wait_count, uint32_t *stage_flags, struct vk_sync *signal_sync) pvr_compute_job_submit() argument
H A Dpvr_cmd_buffer.c84 struct pvr_sub_cmd *sub_cmd) in pvr_cmd_buffer_free_sub_cmd()
86 switch (sub_cmd->type) { in pvr_cmd_buffer_free_sub_cmd()
88 pvr_csb_finish(&sub_cmd->gfx.control_stream); in pvr_cmd_buffer_free_sub_cmd()
89 pvr_bo_free(cmd_buffer->device, sub_cmd->gfx.depth_bias_bo); in pvr_cmd_buffer_free_sub_cmd()
90 pvr_bo_free(cmd_buffer->device, sub_cmd->gfx.scissor_bo); in pvr_cmd_buffer_free_sub_cmd()
94 pvr_csb_finish(&sub_cmd->compute.control_stream); in pvr_cmd_buffer_free_sub_cmd()
100 &sub_cmd->transfer.transfer_cmds, in pvr_cmd_buffer_free_sub_cmd()
108 pvr_finishme("Unsupported sub-command type %d", sub_cmd->type); in pvr_cmd_buffer_free_sub_cmd()
112 list_del(&sub_cmd->link); in pvr_cmd_buffer_free_sub_cmd()
113 vk_free(&cmd_buffer->vk.pool->alloc, sub_cmd); in pvr_cmd_buffer_free_sub_cmd()
83 pvr_cmd_buffer_free_sub_cmd(struct pvr_cmd_buffer *cmd_buffer, struct pvr_sub_cmd *sub_cmd) pvr_cmd_buffer_free_sub_cmd() argument
250 pvr_cmd_buffer_upload_tables(struct pvr_device *device, struct pvr_cmd_buffer *cmd_buffer, struct pvr_sub_cmd_gfx *const sub_cmd) pvr_cmd_buffer_upload_tables() argument
296 pvr_cmd_buffer_emit_ppp_state(struct pvr_cmd_buffer *cmd_buffer, struct pvr_sub_cmd_gfx *const sub_cmd) pvr_cmd_buffer_emit_ppp_state() argument
875 pvr_sub_cmd_gfx_job_init(const struct pvr_device_info *dev_info, struct pvr_cmd_buffer *cmd_buffer, struct pvr_sub_cmd_gfx *sub_cmd) pvr_sub_cmd_gfx_job_init() argument
1071 pvr_sub_cmd_compute_job_init(const struct pvr_physical_device *pdevice, struct pvr_cmd_buffer *cmd_buffer, struct pvr_sub_cmd_compute *sub_cmd) pvr_sub_cmd_compute_job_init() argument
1239 pvr_compute_generate_control_stream(struct pvr_csb *csb, struct pvr_sub_cmd_compute *sub_cmd, const struct pvr_compute_kernel_info *info) pvr_compute_generate_control_stream() argument
1329 pvr_compute_generate_idfwdf(struct pvr_cmd_buffer *cmd_buffer, struct pvr_sub_cmd_compute *const sub_cmd) pvr_compute_generate_idfwdf() argument
1380 pvr_compute_generate_fence(struct pvr_cmd_buffer *cmd_buffer, struct pvr_sub_cmd_compute *const sub_cmd, bool deallocate_shareds) pvr_compute_generate_fence() argument
1420 struct pvr_sub_cmd *sub_cmd = state->current_sub_cmd; pvr_cmd_buffer_end_sub_cmd() local
1585 struct pvr_sub_cmd *sub_cmd; pvr_cmd_buffer_start_sub_cmd() local
2335 pvr_stash_depth_format(struct pvr_cmd_buffer_state *state, struct pvr_sub_cmd_gfx *const sub_cmd) pvr_stash_depth_format() argument
2563 struct pvr_sub_cmd_transfer *sub_cmd; pvr_cmd_buffer_add_transfer_cmd() local
2934 pvr_compute_update_shared(struct pvr_cmd_buffer *cmd_buffer, struct pvr_sub_cmd_compute *const sub_cmd) pvr_compute_update_shared() argument
3030 pvr_compute_update_kernel( struct pvr_cmd_buffer *cmd_buffer, struct pvr_sub_cmd_compute *const sub_cmd, const uint32_t global_workgroup_size[static const PVR_WORKGROUP_DIMENSIONS]) pvr_compute_update_kernel() argument
3118 struct pvr_sub_cmd_compute *sub_cmd; pvr_CmdDispatch() local
3235 pvr_emit_dirty_pds_state(const struct pvr_cmd_buffer *const cmd_buffer, struct pvr_sub_cmd_gfx *const sub_cmd, const uint32_t pds_vertex_descriptor_data_offset) pvr_emit_dirty_pds_state() argument
3725 pvr_setup_fragment_state_pointers(struct pvr_cmd_buffer *const cmd_buffer, struct pvr_sub_cmd_gfx *const sub_cmd) pvr_setup_fragment_state_pointers() argument
3955 pvr_emit_ppp_state(struct pvr_cmd_buffer *const cmd_buffer, struct pvr_sub_cmd_gfx *const sub_cmd) pvr_emit_ppp_state() argument
4159 pvr_emit_dirty_ppp_state(struct pvr_cmd_buffer *const cmd_buffer, struct pvr_sub_cmd_gfx *const sub_cmd) pvr_emit_dirty_ppp_state() argument
4279 pvr_emit_dirty_vdm_state(const struct pvr_cmd_buffer *const cmd_buffer, struct pvr_sub_cmd_gfx *const sub_cmd) pvr_emit_dirty_vdm_state() argument
4420 struct pvr_sub_cmd_gfx *sub_cmd; pvr_validate_draw_state() local
4606 pvr_emit_vdm_index_list(struct pvr_cmd_buffer *cmd_buffer, struct pvr_sub_cmd_gfx *const sub_cmd, VkPrimitiveTopology topology, uint32_t first_vertex, uint32_t vertex_count, uint32_t first_index, uint32_t index_count, uint32_t instance_count) pvr_emit_vdm_index_list() argument
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H A Dpvr_queue.c196 struct pvr_sub_cmd_gfx *sub_cmd, in pvr_process_graphics_cmd()
202 const struct pvr_framebuffer *framebuffer = sub_cmd->framebuffer; in pvr_process_graphics_cmd()
235 if (sub_cmd->job.run_frag && framebuffer->layers > 1) in pvr_process_graphics_cmd()
250 &sub_cmd->job, in pvr_process_graphics_cmd()
284 struct pvr_sub_cmd_compute *sub_cmd, in pvr_process_compute_cmd()
303 sub_cmd, in pvr_process_compute_cmd()
325 struct pvr_sub_cmd_transfer *sub_cmd, in pvr_process_transfer_cmds()
345 sub_cmd, in pvr_process_transfer_cmds()
471 sub_cmd, in pvr_process_cmd_buffer()
474 switch (sub_cmd in pvr_process_cmd_buffer()
193 pvr_process_graphics_cmd(struct pvr_device *device, struct pvr_queue *queue, struct pvr_cmd_buffer *cmd_buffer, struct pvr_sub_cmd_gfx *sub_cmd, struct vk_sync **waits, uint32_t wait_count, uint32_t *stage_flags, struct vk_sync *completions[static PVR_JOB_TYPE_MAX]) pvr_process_graphics_cmd() argument
282 pvr_process_compute_cmd(struct pvr_device *device, struct pvr_queue *queue, struct pvr_sub_cmd_compute *sub_cmd, struct vk_sync **waits, uint32_t wait_count, uint32_t *stage_flags, struct vk_sync *completions[static PVR_JOB_TYPE_MAX]) pvr_process_compute_cmd() argument
323 pvr_process_transfer_cmds(struct pvr_device *device, struct pvr_queue *queue, struct pvr_sub_cmd_transfer *sub_cmd, struct vk_sync **waits, uint32_t wait_count, uint32_t *stage_flags, struct vk_sync *completions[static PVR_JOB_TYPE_MAX]) pvr_process_transfer_cmds() argument
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H A Dpvr_job_transfer.c41 struct pvr_sub_cmd_transfer *sub_cmd, in pvr_transfer_job_submit()
64 &sub_cmd->transfer_cmds, in pvr_transfer_job_submit()
39 pvr_transfer_job_submit(struct pvr_device *device, struct pvr_transfer_ctx *ctx, struct pvr_sub_cmd_transfer *sub_cmd, struct vk_sync **waits, uint32_t wait_count, uint32_t *stage_flags, struct vk_sync *signal_sync) pvr_transfer_job_submit() argument
H A Dpvr_job_transfer.h37 struct pvr_sub_cmd_transfer *sub_cmd,
H A Dpvr_job_compute.h35 struct pvr_sub_cmd_compute *sub_cmd,
/third_party/python/Lib/distutils/command/
H A Dbdist.py125 sub_cmd = self.reinitialize_command(cmd_name)
127 sub_cmd.format = self.formats[i]
131 sub_cmd.owner = self.owner
132 sub_cmd.group = self.group
137 sub_cmd.keep_temp = 1
/third_party/mesa3d/src/gallium/drivers/r600/
H A Devergreen_hw_context.c39 unsigned i, ncopy, csize, sub_cmd, shift; in evergreen_dma_copy_buffer() local
55 sub_cmd = EG_DMA_COPY_DWORD_ALIGNED; in evergreen_dma_copy_buffer()
58 sub_cmd = EG_DMA_COPY_BYTE_ALIGNED; in evergreen_dma_copy_buffer()
69 radeon_emit(cs, DMA_PACKET(DMA_PACKET_COPY, sub_cmd, csize)); in evergreen_dma_copy_buffer()
H A Devergreend.h2801 #define DMA_PACKET(cmd, sub_cmd, n) ((((unsigned)(cmd) & 0xF) << 28) | \
2802 (((unsigned)(sub_cmd) & 0xFF) << 20) |\
H A Devergreen_state.c3784 unsigned sub_cmd, bank_h, bank_w, mt_aspect, nbanks, tile_split, non_disp_tiling = 0; in evergreen_dma_copy_tile() local
3796 sub_cmd = EG_DMA_COPY_TILED; in evergreen_dma_copy_tile()
3868 radeon_emit(cs, DMA_PACKET(DMA_PACKET_COPY, sub_cmd, size)); in evergreen_dma_copy_tile()
/third_party/vk-gl-cts/external/amber/src/src/
H A Dexecutor.cc170 for (const auto& sub_cmd : cmd->AsRepeat()->GetCommands()) { in ExecuteCommand()
171 Result r = ExecuteCommand(engine, sub_cmd.get()); in ExecuteCommand()
/third_party/mesa3d/src/amd/common/
H A Dsid.h301 #define SI_DMA_PACKET(cmd, sub_cmd, n) \
302 ((((unsigned)(cmd)&0xF) << 28) | (((unsigned)(sub_cmd)&0xFF) << 20) | \

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