| /third_party/mesa3d/src/amd/common/ |
| H A D | ac_nir_lower_ngg.c | 529 nir_ssa_def *store_val = intrin->src[0].ssa; in remove_culling_shader_output() local
530 nir_store_var(b, s->pre_cull_position_value_var, store_val, writemask); in remove_culling_shader_output()
613 nir_ssa_def *store_val = intrin->src[0].ssa; in remove_extra_pos_output() local
618 if (store_val->parent_instr->type == nir_instr_type_alu) { in remove_extra_pos_output()
619 nir_alu_instr *alu = nir_instr_as_alu(store_val->parent_instr); in remove_extra_pos_output()
644 rewrite_uses_to_var(b, store_val, s->pos_value_replacement, store_pos_component); in remove_extra_pos_output()
647 rewrite_uses_to_var(b, store_val, s->pos_value_replacement, store_pos_component); in remove_extra_pos_output()
933 nir_ssa_def *store_val = intrin->src[0].ssa; in analyze_shader_before_culling() local
935 analyze_shader_before_culling_walk(store_val, flag, nogs_state); in analyze_shader_before_culling()
1676 nir_ssa_def *store_val in lower_ngg_gs_store_output() local
1753 nir_ssa_def *store_val = nir_vec(b, values, (unsigned)count); lower_ngg_gs_emit_vertex_with_counter() local
2143 ms_store_num_prims(nir_builder *b, nir_ssa_def *store_val, lower_ngg_ms_state *s) ms_store_num_prims() argument
2165 nir_ssa_def *store_val = intrin->src[0].ssa; lower_ms_store_output() local
2258 nir_ssa_def *store_val = intrin->src[0].ssa; update_ms_output_info() local
2274 regroup_store_val(nir_builder *b, nir_ssa_def *store_val) regroup_store_val() argument
2370 nir_ssa_def *store_val = regroup_store_val(b, intrin->src[0].ssa); ms_store_arrayed_output_intrin() local
[all...] |
| H A D | ac_nir_lower_taskmesh_io_to_mem.c | 235 nir_ssa_def *store_val, in task_write_draw_ring()
244 nir_store_buffer_amd(b, store_val, ring, vector_off, scalar_off, in task_write_draw_ring()
286 nir_ssa_def *store_val = nir_vec4(b, x, y, z, rdy); in lower_task_launch_mesh_workgroups() local
287 task_write_draw_ring(b, store_val, 0, s); in lower_task_launch_mesh_workgroups()
302 nir_ssa_def *store_val = intrin->src[0].ssa; in lower_task_payload_store() local
308 nir_store_buffer_amd(b, store_val, ring, addr, ring_off, .base = base, in lower_task_payload_store()
234 task_write_draw_ring(nir_builder *b, nir_ssa_def *store_val, unsigned const_off, lower_tsms_io_state *s) task_write_draw_ring() argument
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| H A D | ac_nir_lower_esgs_io_to_mem.c | 105 nir_ssa_def *store_val = nir_extract_bits(b, &d, 1, start_byte * 8u, 1, store_bytes * 8u); in emit_split_buffer_store() local
106 nir_build_store_buffer_amd(b, store_val, desc, v_off, s_off, .is_swizzled = swizzled, .slc_amd = slc, in emit_split_buffer_store()
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| H A D | ac_nir_lower_tess_io_to_mem.c | 430 nir_ssa_def *store_val = intrin->src[0].ssa; in lower_hs_output_store() local
445 nir_store_buffer_amd(b, store_val, hs_ring_tess_offchip, vmem_off, offchip_offset, .write_mask = write_mask, .memory_modes = nir_var_shader_out); in lower_hs_output_store()
456 nir_store_shared(b, store_val, lds_off, .write_mask = write_mask, in lower_hs_output_store()
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| /third_party/mesa3d/src/gallium/auxiliary/gallivm/ |
| H A D | lp_bld_nir_soa.c | 2279 LLVMValueRef store_val = NULL; in emit_reduce() local
2287 store_val = LLVMBuildBitCast(builder, flt_max, int_bld->elem_type, ""); in emit_reduce()
2293 store_val = LLVMBuildBitCast(builder, flt_min, int_bld->elem_type, ""); in emit_reduce()
2299 store_val = LLVMBuildBitCast(builder, flt_one, int_bld->elem_type, ""); in emit_reduce()
2305 store_val = LLVMConstInt(LLVMInt8TypeInContext(gallivm->context), UINT8_MAX, 0); in emit_reduce()
2308 store_val = LLVMConstInt(LLVMInt16TypeInContext(gallivm->context), UINT16_MAX, 0); in emit_reduce()
2312 store_val = lp_build_const_int32(gallivm, UINT_MAX); in emit_reduce()
2315 store_val = lp_build_const_int64(gallivm, UINT64_MAX); in emit_reduce()
2322 store_val = LLVMConstInt(LLVMInt8TypeInContext(gallivm->context), INT8_MAX, 0); in emit_reduce()
2325 store_val in emit_reduce()
2488 LLVMValueRef store_val = loop_state.counter; emit_read_invocation() local
[all...] |
| /third_party/mesa3d/src/compiler/nir/ |
| H A D | nir_lower_task_shader.c | 66 nir_ssa_def *store_val = intrin->src[0].ssa; in lower_nv_task_output() local
67 nir_store_shared(b, store_val, nir_imm_int(b, s->task_count_shared_addr)); in lower_nv_task_output()
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| /third_party/mesa3d/src/amd/llvm/ |
| H A D | ac_nir_to_llvm.c | 4292 LLVMValueRef store_val = get_src(ctx, instr->src[0]); in visit_intrinsic() local
4296 ac_build_atomic_rmw(&ctx->ac, LLVMAtomicRMWBinOpAdd, gds_base, store_val, "workgroup-one-as"); in visit_intrinsic()
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| /third_party/mesa3d/src/amd/compiler/ |
| H A D | aco_instruction_selection.cpp | 9226 Temp store_val = get_ssa_temp(ctx, instr->src[0].ssa);
9230 bld.ds(aco_opcode::ds_add_u32, as_vgpr(ctx, gds_addr), as_vgpr(ctx, store_val), m, 0u, 0u,
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