| /third_party/pcre2/pcre2/src/ |
| H A D | pcre2_dfa_match.c | 750 int state_offset = current_state->offset; in internal_dfa_match() local
759 if (state_offset < 0) in internal_dfa_match()
763 ADD_NEW_DATA(state_offset, current_state->count, in internal_dfa_match()
770 current_state->offset = state_offset = -state_offset; in internal_dfa_match()
780 if (active_states[j].offset == state_offset && in internal_dfa_match()
787 code = start_code + state_offset; in internal_dfa_match()
873 ADD_ACTIVE(state_offset + 1 + LINK_SIZE, 0); in internal_dfa_match()
876 ADD_ACTIVE(state_offset - (int)GET(code, 1), 0); in internal_dfa_match()
938 ADD_ACTIVE(state_offset in internal_dfa_match()
[all...] |
| /third_party/mesa3d/src/intel/common/ |
| H A D | intel_batch_decoder.c | 902 const char *struct_type, uint32_t state_offset, in decode_dynamic_state()
905 uint64_t state_addr = ctx->dynamic_base + state_offset; in decode_dynamic_state()
930 count = update_count(ctx, ctx->dynamic_base + state_offset, in decode_dynamic_state()
949 uint32_t state_offset = 0; in decode_dynamic_state_pointers() local
955 state_offset = iter.raw_value; in decode_dynamic_state_pointers()
959 decode_dynamic_state(ctx, struct_type, state_offset, count); in decode_dynamic_state_pointers()
967 uint32_t state_offset = 0; in decode_3dstate_viewport_state_pointers() local
979 state_offset = iter.raw_value; in decode_3dstate_viewport_state_pointers()
980 decode_dynamic_state(ctx, "CLIP_VIEWPORT", state_offset, 1); in decode_3dstate_viewport_state_pointers()
983 state_offset in decode_3dstate_viewport_state_pointers()
901 decode_dynamic_state(struct intel_batch_decode_ctx *ctx, const char *struct_type, uint32_t state_offset, int count) decode_dynamic_state() argument
1025 uint32_t state_offset = 0; decode_3dstate_cc_state_pointers() local
[all...] |
| /third_party/mesa3d/src/intel/vulkan/ |
| H A D | genX_blorp_exec.c | 177 uint32_t state_offset; in blorp_alloc_binding_table() local
182 &state_offset, &bt_state); in blorp_alloc_binding_table()
192 bt_map[i] = surface_state.offset + state_offset; in blorp_alloc_binding_table()
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| H A D | anv_blorp.c | 1144 uint32_t *state_offset, in anv_cmd_buffer_alloc_blorp_binding_table()
1148 state_offset); in anv_cmd_buffer_alloc_blorp_binding_table()
1161 state_offset); in anv_cmd_buffer_alloc_blorp_binding_table()
1173 uint32_t state_offset; in binding_table_for_surface_state() local
1177 anv_cmd_buffer_alloc_blorp_binding_table(cmd_buffer, 1, &state_offset, in binding_table_for_surface_state()
1183 bt_map[0] = surface_state.offset + state_offset; in binding_table_for_surface_state()
1142 anv_cmd_buffer_alloc_blorp_binding_table(struct anv_cmd_buffer *cmd_buffer, uint32_t num_entries, uint32_t *state_offset, struct anv_state *bt_state) anv_cmd_buffer_alloc_blorp_binding_table() argument
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| H A D | anv_batch_chain.c | 771 * \param[out] state_offset The offset surface surface state base address
780 uint32_t entries, uint32_t *state_offset) in anv_cmd_buffer_alloc_binding_table()
800 *state_offset = 0; in anv_cmd_buffer_alloc_binding_table()
803 *state_offset = -bt_block->offset; in anv_cmd_buffer_alloc_binding_table()
779 anv_cmd_buffer_alloc_binding_table(struct anv_cmd_buffer *cmd_buffer, uint32_t entries, uint32_t *state_offset) anv_cmd_buffer_alloc_binding_table() argument
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| H A D | genX_cmd_buffer.c | 2570 uint32_t state_offset; in emit_binding_table() local
2580 &state_offset); in emit_binding_table()
2614 bt_map[s] = surface_state.offset + state_offset; in emit_binding_table()
2637 bt_map[s] = surface_state.offset + state_offset; in emit_binding_table()
2659 bt_map[s] = surface_state.offset + state_offset; in emit_binding_table()
2675 bt_map[s] = set->desc_surface_state.offset + state_offset; in emit_binding_table()
2845 bt_map[s] = surface_state.offset + state_offset; in emit_binding_table()
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| H A D | anv_private.h | 2933 uint32_t entries, uint32_t *state_offset);
2953 uint32_t *state_offset,
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| /third_party/mesa3d/src/intel/blorp/ |
| H A D | blorp_genX_exec.h | 1465 void *state, uint32_t state_offset, in blorp_emit_surface_state()
1521 blorp_surface_reloc(batch, state_offset + isl_dev->ss.addr_offset, in blorp_emit_surface_state()
1531 blorp_surface_reloc(batch, state_offset + isl_dev->ss.aux_addr_offset, in blorp_emit_surface_state()
1539 blorp_surface_reloc(batch, state_offset + in blorp_emit_surface_state()
1548 dst_addr.offset += state_offset + isl_dev->ss.clear_value_offset; in blorp_emit_surface_state()
2074 uint32_t *state_offset, in blorp_get_compute_push_const()
2084 *state_offset = 0; in blorp_get_compute_push_const()
2121 *state_offset = push_const_offset; in blorp_get_compute_push_const()
1462 blorp_emit_surface_state(struct blorp_batch *batch, const struct brw_blorp_surface_info *surface, UNUSED enum isl_aux_op aux_op, void *state, uint32_t state_offset, uint8_t color_write_disable, bool is_render_target) blorp_emit_surface_state() argument
2071 blorp_get_compute_push_const(struct blorp_batch *batch, const struct blorp_params *params, uint32_t threads, uint32_t *state_offset, unsigned *state_size) blorp_get_compute_push_const() argument
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| /third_party/mesa3d/src/gallium/drivers/crocus/ |
| H A D | crocus_batch.c | 445 crocus_state_reloc(struct crocus_batch *batch, uint32_t state_offset, in crocus_state_reloc() argument
449 assert(state_offset <= batch->state.bo->size - sizeof(uint32_t)); in crocus_state_reloc()
451 return emit_reloc(batch, &batch->state.relocs, state_offset, in crocus_state_reloc()
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| /third_party/mesa3d/src/amd/vulkan/ |
| H A D | radv_device_generated_commands.c | 170 uint16_t state_offset; member
734 nir_ssa_def *stream_offset = nir_iadd(&b, load_param16(&b, state_offset), stream_base); in build_dgc_prepare_shader()
1065 layout->state_offset = pCreateInfo->pTokens[i].offset; in radv_CreateIndirectCommandsLayoutNV()
1203 .state_offset = layout->state_offset, in radv_prepare_dgc()
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| H A D | radv_private.h | 3043 uint16_t state_offset;
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| /third_party/mesa3d/src/intel/tools/ |
| H A D | aubinator_viewer_decoder.cpp | 645 uint32_t state_offset = 0; in decode_dynamic_state_pointers() local
651 state_offset = iter.raw_value; in decode_dynamic_state_pointers()
656 uint64_t state_addr = ctx->dynamic_base + state_offset; in decode_dynamic_state_pointers()
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/DartARM32/ |
| H A D | assembler_arm.cc | 3213 const uword state_offset = ClassHeapStats::state_offset();
3214 ldr(temp_reg, Address(temp_reg, state_offset));
|