| /third_party/ffmpeg/libavcodec/aarch64/ |
| H A D | idctdsp_neon.S | 61 sqxtn v0.8b, v0.8h
62 sqxtn v1.8b, v1.8h
63 sqxtn v2.8b, v2.8h
64 sqxtn v3.8b, v3.8h
65 sqxtn v5.8b, v16.8h
67 sqxtn v6.8b, v17.8h
69 sqxtn v7.8b, v18.8h
71 sqxtn v16.8b, v19.8h
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| H A D | mpegaudiodsp_neon.S | 120 sqxtn v16.4h, v16.4s
121 sqxtn v18.4h, v19.4s
165 sqxtn v20.4h, v20.4s
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| H A D | vp8dsp_neon.S | 352 sqxtn v18.8b, v18.8h // narrow result back into v18
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| H A D | vp9lpf_neon.S | 90 sqxtn \dst\().8b, \in1
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| /third_party/node/deps/v8/src/execution/arm64/ |
| H A D | simulator-logic-arm64.cc | 1814 LogicVRegister Simulator::sqxtn(VectorFormat vform, LogicVRegister dst, in sqxtn() function in v8::internal::Simulator
2255 return sqxtn(vformdst, dst, shifted_src); in sqshrn()
2264 return sqxtn(vformdst, dst, shifted_src); in sqshrn2()
2273 return sqxtn(vformdst, dst, shifted_src); in sqrshrn()
2282 return sqxtn(vformdst, dst, shifted_src); in sqrshrn2()
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| H A D | simulator-arm64.h | 1944 LogicVRegister sqxtn(VectorFormat vform, LogicVRegister dst,
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| H A D | simulator-arm64.cc | 4146 sqxtn(vf, rd, rn);
5460 sqxtn(vf, rd, rn);
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| /third_party/vixl/test/aarch64/ |
| H A D | test-trace-aarch64.cc | 1707 __ sqxtn(b27, h26); in GenerateTestSequenceNEON()
1708 __ sqxtn(h17, s11); in GenerateTestSequenceNEON()
1709 __ sqxtn(s22, d31); in GenerateTestSequenceNEON()
1710 __ sqxtn(v26.V2S(), v5.V2D()); in GenerateTestSequenceNEON()
1711 __ sqxtn(v13.V4H(), v7.V4S()); in GenerateTestSequenceNEON()
1712 __ sqxtn(v19.V8B(), v19.V8H()); in GenerateTestSequenceNEON()
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| H A D | test-cpu-features-aarch64.cc | 1917 TEST_NEON(sqxtn_0, sqxtn(v0.V8B(), v1.V8H()))
1918 TEST_NEON(sqxtn_1, sqxtn(v0.V4H(), v1.V4S()))
1919 TEST_NEON(sqxtn_2, sqxtn(v0.V2S(), v1.V2D()))
1923 TEST_NEON(sqxtn_3, sqxtn(b0, h1))
1924 TEST_NEON(sqxtn_4, sqxtn(h0, s1))
1925 TEST_NEON(sqxtn_5, sqxtn(s0, d1))
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| H A D | test-simulator-aarch64.cc | 4852 DEFINE_TEST_NEON_2DIFF_NARROW(sqxtn, Basic)
4914 DEFINE_TEST_NEON_2DIFF_SCALAR_NARROW(sqxtn, Basic)
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| /third_party/vixl/src/aarch64/ |
| H A D | logic-aarch64.cc | 2274 LogicVRegister Simulator::sqxtn(VectorFormat vform,
3392 return sqxtn(vformdst, dst, shifted_src);
3404 return sqxtn(vformdst, dst, shifted_src);
3416 return sqxtn(vformdst, dst, shifted_src);
3428 return sqxtn(vformdst, dst, shifted_src);
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| H A D | simulator-aarch64.cc | 2657 sqxtn(vform, result, zn); in Simulator()
7194 sqxtn(vf, rd, rn); in Simulator()
8869 sqxtn(vf, rd, rn); in Simulator()
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| H A D | simulator-aarch64.h | 4246 LogicVRegister sqxtn(VectorFormat vform,
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| H A D | assembler-aarch64.h | 2812 void sqxtn(const VRegister& vd, const VRegister& vn);
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| H A D | assembler-aarch64.cc | 4941 void Assembler::sqxtn(const VRegister& vd, const VRegister& vn) {
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| H A D | macro-assembler-aarch64.h | 3056 V(sqxtn, Sqxtn) \
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| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | assembler-arm64.h | 535 void sqxtn(const VRegister& vd, const VRegister& vn);
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| H A D | macro-assembler-arm64.h | 307 V(sqxtn, Sqxtn) \
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| H A D | assembler-arm64.cc | 3437 void Assembler::sqxtn(const VRegister& vd, const VRegister& vn) { in sqxtn() function in v8::internal::Assembler
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