| /third_party/ffmpeg/libswscale/aarch64/ |
| H A D | output.S | 51 sqshrun2 v3.8h, v4.4s, #16 // clip16(val1>>16)
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| /third_party/ffmpeg/libavcodec/aarch64/ |
| H A D | simple_idct_neon.S | 233 sqshrun2 v1.16B, v16.8H, #COL_SHIFT-16
235 sqshrun2 v3.16B, v18.8H, #COL_SHIFT-16
240 sqshrun2 v2.16B, v16.8H, #COL_SHIFT-16
242 sqshrun2 v4.16B, v18.8H, #COL_SHIFT-16
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| H A D | h264pred_neon.S | 159 sqshrun2 v0.16b, v1.8h, #5
524 sqshrun2 v0.8h, v17.4s, #5
528 sqshrun2 v1.8h, v17.4s, #5
608 sqshrun2 v0.8h, v2.4s, #5
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| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | assembler-arm64.h | 1411 void sqshrun2(const VRegister& vd, const VRegister& vn, int shift);
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| H A D | macro-assembler-arm64.h | 1232 V(sqshrun2, Sqshrun2) \
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| H A D | assembler-arm64.cc | 1784 void Assembler::sqshrun2(const VRegister& vd, const VRegister& vn, int shift) { in sqshrun2() function in v8::internal::Assembler
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| /third_party/vixl/test/aarch64/ |
| H A D | test-trace-aarch64.cc | 1693 __ sqshrun2(v16.V16B(), v27.V8H(), 3); in GenerateTestSequenceNEON()
1694 __ sqshrun2(v27.V4S(), v14.V2D(), 18); in GenerateTestSequenceNEON()
1695 __ sqshrun2(v23.V8H(), v14.V4S(), 1); in GenerateTestSequenceNEON()
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| H A D | test-cpu-features-aarch64.cc | 1900 TEST_NEON(sqshrun2_0, sqshrun2(v0.V16B(), v1.V8H(), 6))
1901 TEST_NEON(sqshrun2_1, sqshrun2(v0.V8H(), v1.V4S(), 5))
1902 TEST_NEON(sqshrun2_2, sqshrun2(v0.V4S(), v1.V2D(), 18))
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| /third_party/node/deps/v8/src/execution/arm64/ |
| H A D | simulator-arm64.h | 1983 LogicVRegister sqshrun2(VectorFormat vform, LogicVRegister dst,
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| H A D | simulator-arm64.cc | 5956 sqshrun2(vf, rd, rn, right_shift);
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| H A D | simulator-logic-arm64.cc | 2294 LogicVRegister Simulator::sqshrun2(VectorFormat vform, LogicVRegister dst, in sqshrun2() function in v8::internal::Simulator
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| /third_party/vixl/src/aarch64/ |
| H A D | simulator-aarch64.h | 4320 LogicVRegister sqshrun2(VectorFormat vform,
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| H A D | assembler-aarch64.h | 3282 void sqshrun2(const VRegister& vd, const VRegister& vn, int shift);
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| H A D | assembler-aarch64.cc | 5752 void Assembler::sqshrun2(const VRegister& vd, const VRegister& vn, int shift) {
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| H A D | logic-aarch64.cc | 3444 LogicVRegister Simulator::sqshrun2(VectorFormat vform,
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| H A D | macro-assembler-aarch64.h | 3175 V(sqshrun2, Sqshrun2) \
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| H A D | simulator-aarch64.cc | 9543 sqshrun2(vf, rd, rn, right_shift); in Simulator()
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