Searched refs:sqshrn2 (Results 1 - 15 of 15) sorted by relevance
| /third_party/ffmpeg/libavcodec/aarch64/ |
| H A D | vp8dsp_neon.S | 439 sqshrn2 v16.16b, v17.8h, #7 // clamp(( 9*w + 63)>>7)
441 sqshrn2 v19.16b, v20.8h, #7 // clamp((18*w + 63)>>7)
443 sqshrn2 v22.16b, v23.8h, #7 // clamp((27*w + 63)>>7)
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| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | assembler-arm64.h | 1399 void sqshrn2(const VRegister& vd, const VRegister& vn, int shift);
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| H A D | macro-assembler-arm64.h | 1230 V(sqshrn2, Sqshrn2) \
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| H A D | assembler-arm64.cc | 1764 void Assembler::sqshrn2(const VRegister& vd, const VRegister& vn, int shift) { in sqshrn2() function in v8::internal::Assembler
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| /third_party/vixl/test/aarch64/ |
| H A D | test-trace-aarch64.cc | 1684 __ sqshrn2(v14.V16B(), v23.V8H(), 1); in GenerateTestSequenceNEON()
1685 __ sqshrn2(v25.V4S(), v22.V2D(), 27); in GenerateTestSequenceNEON()
1686 __ sqshrn2(v31.V8H(), v12.V4S(), 10); in GenerateTestSequenceNEON()
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| H A D | test-cpu-features-aarch64.cc | 1891 TEST_NEON(sqshrn2_0, sqshrn2(v0.V16B(), v1.V8H(), 6))
1892 TEST_NEON(sqshrn2_1, sqshrn2(v0.V8H(), v1.V4S(), 10))
1893 TEST_NEON(sqshrn2_2, sqshrn2(v0.V4S(), v1.V2D(), 2))
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| /third_party/node/deps/v8/src/execution/arm64/ |
| H A D | simulator-arm64.h | 1975 LogicVRegister sqshrn2(VectorFormat vform, LogicVRegister dst,
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| H A D | simulator-arm64.cc | 5942 sqshrn2(vf, rd, rn, right_shift);
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| H A D | simulator-logic-arm64.cc | 2258 LogicVRegister Simulator::sqshrn2(VectorFormat vform, LogicVRegister dst, in sqshrn2() function in v8::internal::Simulator
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| /third_party/vixl/src/aarch64/ |
| H A D | simulator-aarch64.h | 4304 LogicVRegister sqshrn2(VectorFormat vform,
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| H A D | assembler-aarch64.h | 3270 void sqshrn2(const VRegister& vd, const VRegister& vn, int shift);
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| H A D | assembler-aarch64.cc | 5724 void Assembler::sqshrn2(const VRegister& vd, const VRegister& vn, int shift) {
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| H A D | logic-aarch64.cc | 3396 LogicVRegister Simulator::sqshrn2(VectorFormat vform,
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| H A D | macro-assembler-aarch64.h | 3173 V(sqshrn2, Sqshrn2) \
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| H A D | simulator-aarch64.cc | 9529 sqshrn2(vf, rd, rn, right_shift); in Simulator()
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