| /third_party/ffmpeg/libswscale/aarch64/ |
| H A D | hscale.S | 88 sqshrn v0.4H, v0.4S, #7 // shift and clip the 2x16-bit final values
185 sqshrn v0.4H, v0.4S, #7 // shift and clip the 2x16-bit final values
186 sqshrn v1.4H, v5.4S, #7 // shift and clip the 2x16-bit final values
214 sqshrn v0.4H, v0.4S, #7 // shift and clip the 2x16-bit final values
215 sqshrn v1.4H, v5.4S, #7 // shift and clip the 2x16-bit final values
235 sqshrn h0, s0, #7 // shift and clip the 2x16-bit final value
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| /third_party/ffmpeg/libavcodec/aarch64/ |
| H A D | vp8dsp_neon.S | 438 sqshrn v16.8b, v16.8h, #7
440 sqshrn v19.8b, v19.8h, #7
442 sqshrn v22.8b, v22.8h, #7
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| /third_party/vixl/test/aarch64/ |
| H A D | test-trace-aarch64.cc | 1678 __ sqshrn(b1, h28, 1); in GenerateTestSequenceNEON()
1679 __ sqshrn(h31, s7, 10); in GenerateTestSequenceNEON()
1680 __ sqshrn(s4, d10, 24); in GenerateTestSequenceNEON()
1681 __ sqshrn(v10.V2S(), v1.V2D(), 29); in GenerateTestSequenceNEON()
1682 __ sqshrn(v3.V4H(), v13.V4S(), 14); in GenerateTestSequenceNEON()
1683 __ sqshrn(v27.V8B(), v6.V8H(), 7); in GenerateTestSequenceNEON()
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| H A D | test-cpu-features-aarch64.cc | 1888 TEST_NEON(sqshrn_0, sqshrn(v0.V8B(), v1.V8H(), 5))
1889 TEST_NEON(sqshrn_1, sqshrn(v0.V4H(), v1.V4S(), 5))
1890 TEST_NEON(sqshrn_2, sqshrn(v0.V2S(), v1.V2D(), 2))
1894 TEST_NEON(sqshrn_3, sqshrn(b0, h1, 2))
1895 TEST_NEON(sqshrn_4, sqshrn(h0, s1, 8))
1896 TEST_NEON(sqshrn_5, sqshrn(s0, d1, 27))
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| H A D | test-simulator-aarch64.cc | 4781 DEFINE_TEST_NEON_2OPIMM_NARROW(sqshrn, Basic, TypeWidth)
4814 DEFINE_TEST_NEON_2OPIMM_SCALAR_NARROW(sqshrn, Basic, TypeWidth)
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| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | assembler-arm64.h | 1396 void sqshrn(const VRegister& vd, const VRegister& vn, int shift);
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| H A D | macro-assembler-arm64.h | 1229 V(sqshrn, Sqshrn) \
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| H A D | assembler-arm64.cc | 1759 void Assembler::sqshrn(const VRegister& vd, const VRegister& vn, int shift) { in sqshrn() function in v8::internal::Assembler
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| /third_party/node/deps/v8/src/execution/arm64/ |
| H A D | simulator-arm64.h | 1973 LogicVRegister sqshrn(VectorFormat vform, LogicVRegister dst,
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| H A D | simulator-arm64.cc | 5786 sqshrn(vf, rd, rn, right_shift);
5944 sqshrn(vf, rd, rn, right_shift);
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| H A D | simulator-logic-arm64.cc | 2249 LogicVRegister Simulator::sqshrn(VectorFormat vform, LogicVRegister dst, in sqshrn() function in v8::internal::Simulator
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| /third_party/vixl/src/aarch64/ |
| H A D | simulator-aarch64.cc | 2699 sqshrn(vform, result, zn, right_shift_dist); in Simulator()
9369 sqshrn(vf, rd, rn, right_shift); in Simulator()
9531 sqshrn(vf, rd, rn, right_shift); in Simulator()
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| H A D | simulator-aarch64.h | 4300 LogicVRegister sqshrn(VectorFormat vform,
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| H A D | assembler-aarch64.h | 3267 void sqshrn(const VRegister& vd, const VRegister& vn, int shift);
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| H A D | assembler-aarch64.cc | 5717 void Assembler::sqshrn(const VRegister& vd, const VRegister& vn, int shift) {
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| H A D | logic-aarch64.cc | 3384 LogicVRegister Simulator::sqshrn(VectorFormat vform,
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| H A D | macro-assembler-aarch64.h | 3172 V(sqshrn, Sqshrn) \
|