| /third_party/ffmpeg/libswscale/aarch64/ |
| H A D | yuv2rgb_neon.S | 132 sqrshrun \r1, v20.8H, #1 // clip_u8((Y1 + R1) >> 1)
133 sqrshrun \r2, v21.8H, #1 // clip_u8((Y2 + R1) >> 1)
134 sqrshrun \g1, v22.8H, #1 // clip_u8((Y1 + G1) >> 1)
135 sqrshrun \g2, v23.8H, #1 // clip_u8((Y2 + G1) >> 1)
136 sqrshrun \b1, v24.8H, #1 // clip_u8((Y1 + B1) >> 1)
137 sqrshrun \b2, v25.8H, #1 // clip_u8((Y2 + B1) >> 1)
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| /third_party/ffmpeg/libavcodec/aarch64/ |
| H A D | vp9mc_16bpp_neon.S | 206 // The sqrshrun takes care of clamping negative values to zero, but
208 sqrshrun v1.4h, v1.4s, #7
209 sqrshrun v24.4h, v24.4s, #7
216 sqrshrun v2.4h, v3.4s, #7
217 sqrshrun v25.4h, v26.4s, #7
327 sqrshrun \reg1\().4h, \reg1\().4s, #7
328 sqrshrun \reg2\().4h, \reg2\().4s, #7
329 sqrshrun \reg3\().4h, \reg3\().4s, #7
330 sqrshrun \reg4\().4h, \reg4\().4s, #7
356 sqrshrun \reg
[all...] |
| H A D | vp9mc_neon.S | 284 sqrshrun v1.8b, v1.8h, #7
285 sqrshrun v24.8b, v24.8h, #7
390 sqrshrun \reg1\().8b, \reg1\().8h, #7
391 sqrshrun \reg2\().8b, \reg2\().8h, #7
408 sqrshrun \reg1\().8b, \reg1\().8h, #7
409 sqrshrun \reg2\().8b, \reg2\().8h, #7
410 sqrshrun \reg3\().8b, \reg3\().8h, #7
411 sqrshrun \reg4\().8b, \reg4\().8h, #7
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| H A D | h264qpel_neon.S | 56 sqrshrun \d0\().8B, \d0\().8H, #5
57 sqrshrun \d1\().8B, \d1\().8H, #5
74 sqrshrun \d0\().8B, \d0\().8H, #5
75 sqrshrun \d1\().8B, \d1\().8H, #5
116 sqrshrun \d0\().8B, \d0\().8H, #5
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| H A D | vp8dsp_neon.S | 734 sqrshrun \d\().8b, v22.8h, #7
769 sqrshrun \d0\().8b, v19.8h, #7
797 sqrshrun \d0\().8b, v31.8h, #7
798 sqrshrun \d1\().8b, \s6\().8h, #7
814 sqrshrun \d\().8b, v22.8h, #7
833 sqrshrun \d0\().8b, v21.8h, #7
|
| /third_party/vixl/test/aarch64/ |
| H A D | test-trace-aarch64.cc | 1636 __ sqrshrun(b16, h9, 5); in GenerateTestSequenceNEON()
1637 __ sqrshrun(h3, s24, 15); in GenerateTestSequenceNEON()
1638 __ sqrshrun(s16, d18, 8); in GenerateTestSequenceNEON()
1639 __ sqrshrun(v28.V2S(), v23.V2D(), 8); in GenerateTestSequenceNEON()
1640 __ sqrshrun(v31.V4H(), v25.V4S(), 10); in GenerateTestSequenceNEON()
1641 __ sqrshrun(v19.V8B(), v23.V8H(), 2); in GenerateTestSequenceNEON()
|
| H A D | test-cpu-features-aarch64.cc | 1846 TEST_NEON(sqrshrun_0, sqrshrun(v0.V8B(), v1.V8H(), 3))
1847 TEST_NEON(sqrshrun_1, sqrshrun(v0.V4H(), v1.V4S(), 6))
1848 TEST_NEON(sqrshrun_2, sqrshrun(v0.V2S(), v1.V2D(), 13))
1852 TEST_NEON(sqrshrun_3, sqrshrun(b0, h1, 7))
1853 TEST_NEON(sqrshrun_4, sqrshrun(h0, s1, 13))
1854 TEST_NEON(sqrshrun_5, sqrshrun(s0, d1, 29))
|
| H A D | test-simulator-aarch64.cc | 4797 DEFINE_TEST_NEON_2OPIMM_NARROW(sqrshrun, Basic, TypeWidth)
4829 DEFINE_TEST_NEON_2OPIMM_SCALAR_NARROW(sqrshrun, Basic, TypeWidth)
|
| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | assembler-arm64.h | 1414 void sqrshrun(const VRegister& vd, const VRegister& vn, int shift);
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| H A D | macro-assembler-arm64.h | 1225 V(sqrshrun, Sqrshrun) \
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| H A D | assembler-arm64.cc | 1789 void Assembler::sqrshrun(const VRegister& vd, const VRegister& vn, int shift) { in sqrshrun() function in v8::internal::Assembler
|
| /third_party/node/deps/v8/src/execution/arm64/ |
| H A D | simulator-arm64.h | 1985 LogicVRegister sqrshrun(VectorFormat vform, LogicVRegister dst,
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| H A D | simulator-arm64.cc | 5795 sqrshrun(vf, rd, rn, right_shift);
5965 sqrshrun(vf, rd, rn, right_shift);
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| H A D | simulator-logic-arm64.cc | 2303 LogicVRegister Simulator::sqrshrun(VectorFormat vform, LogicVRegister dst, in sqrshrun() function in v8::internal::Simulator
|
| /third_party/vixl/src/aarch64/ |
| H A D | simulator-aarch64.cc | 2693 sqrshrun(vform, result, zn, right_shift_dist); in Simulator()
9378 sqrshrun(vf, rd, rn, right_shift); in Simulator()
9552 sqrshrun(vf, rd, rn, right_shift); in Simulator()
|
| H A D | simulator-aarch64.h | 4324 LogicVRegister sqrshrun(VectorFormat vform,
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| H A D | assembler-aarch64.h | 3285 void sqrshrun(const VRegister& vd, const VRegister& vn, int shift);
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| H A D | assembler-aarch64.cc | 5759 void Assembler::sqrshrun(const VRegister& vd, const VRegister& vn, int shift) {
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| H A D | logic-aarch64.cc | 3456 LogicVRegister Simulator::sqrshrun(VectorFormat vform,
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| H A D | macro-assembler-aarch64.h | 3168 V(sqrshrun, Sqrshrun) \
|