| /third_party/ffmpeg/libavresample/aarch64/ |
| H A D | audio_convert_neon.S | 35 sqrshrn v4.4h, v4.4s, #16
41 sqrshrn v6.4h, v6.4s, #16
53 sqrshrn v4.4h, v4.4s, #16
58 sqrshrn v6.4h, v6.4s, #16
63 3: sqrshrn v4.4h, v4.4s, #16
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| H A D | resample_neon.S | 195 sqrshrn v\rn\().4h, v\rn\().4s, #15
229 sqrshrn v\rn\().2s, v\rn\().2d, #30
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| /third_party/ffmpeg/libswresample/aarch64/ |
| H A D | audio_convert_neon.S | 36 sqrshrn v4.4h, v4.4s, #16
42 sqrshrn v6.4h, v6.4s, #16
54 sqrshrn v4.4h, v4.4s, #16
59 sqrshrn v6.4h, v6.4s, #16
64 3: sqrshrn v4.4h, v4.4s, #16
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| /third_party/ffmpeg/libavcodec/aarch64/ |
| H A D | hevcdsp_idct_neon.S | 242 sqrshrn \n\().4h, \n\().4s, \m
434 sqrshrn \out0\().4h, \in0, \shift
436 sqrshrn \out1\().4h, \in2, \shift
438 sqrshrn \out2\().4h, \in4, \shift
440 sqrshrn \out3\().4h, \in6, \shift
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| /third_party/vixl/test/aarch64/ |
| H A D | test-trace-aarch64.cc | 1627 __ sqrshrn(b6, h21, 4); in GenerateTestSequenceNEON()
1628 __ sqrshrn(h14, s17, 11); in GenerateTestSequenceNEON()
1629 __ sqrshrn(s25, d27, 10); in GenerateTestSequenceNEON()
1630 __ sqrshrn(v6.V2S(), v13.V2D(), 18); in GenerateTestSequenceNEON()
1631 __ sqrshrn(v5.V4H(), v9.V4S(), 15); in GenerateTestSequenceNEON()
1632 __ sqrshrn(v19.V8B(), v12.V8H(), 1); in GenerateTestSequenceNEON()
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| H A D | test-cpu-features-aarch64.cc | 1837 TEST_NEON(sqrshrn_0, sqrshrn(v0.V8B(), v1.V8H(), 1))
1838 TEST_NEON(sqrshrn_1, sqrshrn(v0.V4H(), v1.V4S(), 14))
1839 TEST_NEON(sqrshrn_2, sqrshrn(v0.V2S(), v1.V2D(), 29))
1843 TEST_NEON(sqrshrn_3, sqrshrn(b0, h1, 5))
1844 TEST_NEON(sqrshrn_4, sqrshrn(h0, s1, 4))
1845 TEST_NEON(sqrshrn_5, sqrshrn(s0, d1, 30))
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| H A D | test-simulator-aarch64.cc | 4782 DEFINE_TEST_NEON_2OPIMM_NARROW(sqrshrn, Basic, TypeWidth)
4815 DEFINE_TEST_NEON_2OPIMM_SCALAR_NARROW(sqrshrn, Basic, TypeWidth)
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| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | assembler-arm64.h | 1402 void sqrshrn(const VRegister& vd, const VRegister& vn, int shift);
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| H A D | macro-assembler-arm64.h | 1223 V(sqrshrn, Sqrshrn) \
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| H A D | assembler-arm64.cc | 1769 void Assembler::sqrshrn(const VRegister& vd, const VRegister& vn, int shift) { in sqrshrn() function in v8::internal::Assembler
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| /third_party/node/deps/v8/src/execution/arm64/ |
| H A D | simulator-arm64.h | 1977 LogicVRegister sqrshrn(VectorFormat vform, LogicVRegister dst,
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| H A D | simulator-arm64.cc | 5789 sqrshrn(vf, rd, rn, right_shift);
5951 sqrshrn(vf, rd, rn, right_shift);
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| H A D | simulator-logic-arm64.cc | 2267 LogicVRegister Simulator::sqrshrn(VectorFormat vform, LogicVRegister dst, in sqrshrn() function in v8::internal::Simulator
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| /third_party/vixl/src/aarch64/ |
| H A D | simulator-aarch64.cc | 2687 sqrshrn(vform, result, zn, right_shift_dist); in Simulator()
9372 sqrshrn(vf, rd, rn, right_shift); in Simulator()
9538 sqrshrn(vf, rd, rn, right_shift); in Simulator()
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| H A D | simulator-aarch64.h | 4308 LogicVRegister sqrshrn(VectorFormat vform,
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| H A D | assembler-aarch64.h | 3273 void sqrshrn(const VRegister& vd, const VRegister& vn, int shift);
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| H A D | assembler-aarch64.cc | 5731 void Assembler::sqrshrn(const VRegister& vd, const VRegister& vn, int shift) {
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| H A D | logic-aarch64.cc | 3408 LogicVRegister Simulator::sqrshrn(VectorFormat vform,
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| H A D | macro-assembler-aarch64.h | 3166 V(sqrshrn, Sqrshrn) \
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