| /third_party/vixl/test/aarch64/ |
| H A D | test-api-movprfx-aarch64.cc | 2217 __ sqrdmlah(z27.VnB(), z28.VnB(), z19.VnB()); in TEST()
2220 __ sqrdmlah(z27.VnH(), z28.VnH(), z1.VnH(), 0); in TEST()
2223 __ sqrdmlah(z27.VnS(), z28.VnS(), z1.VnS(), 0); in TEST()
2226 __ sqrdmlah(z27.VnD(), z28.VnD(), z1.VnD(), 0); in TEST()
3054 __ sqrdmlah(z27.VnB(), z28.VnB(), z19.VnB()); in TEST()
3057 __ sqrdmlah(z27.VnH(), z28.VnH(), z1.VnH(), 0); in TEST()
3060 __ sqrdmlah(z27.VnS(), z28.VnS(), z1.VnS(), 0); in TEST()
3063 __ sqrdmlah(z27.VnD(), z28.VnD(), z1.VnD(), 0); in TEST()
3407 __ sqrdmlah(z27.VnB(), z27.VnB(), z19.VnB()); in TEST()
3410 __ sqrdmlah(z2 in TEST()
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| H A D | test-cpu-features-aarch64.cc | 3419 TEST_RDM_NEON(sqrdmlah_0, sqrdmlah(v0.V4H(), v1.V4H(), v2.H(), 5))
3420 TEST_RDM_NEON(sqrdmlah_1, sqrdmlah(v0.V8H(), v1.V8H(), v2.H(), 4))
3421 TEST_RDM_NEON(sqrdmlah_2, sqrdmlah(v0.V2S(), v1.V2S(), v2.S(), 3))
3422 TEST_RDM_NEON(sqrdmlah_3, sqrdmlah(v0.V4S(), v1.V4S(), v2.S(), 0))
3423 TEST_RDM_NEON(sqrdmlah_4, sqrdmlah(h0, h1, v2.H(), 5))
3424 TEST_RDM_NEON(sqrdmlah_5, sqrdmlah(s0, s1, v2.S(), 1))
3425 TEST_RDM_NEON(sqrdmlah_6, sqrdmlah(v0.V4H(), v1.V4H(), v2.V4H()))
3426 TEST_RDM_NEON(sqrdmlah_7, sqrdmlah(v0.V8H(), v1.V8H(), v2.V8H()))
3427 TEST_RDM_NEON(sqrdmlah_8, sqrdmlah(v0.V2S(), v1.V2S(), v2.V2S()))
3428 TEST_RDM_NEON(sqrdmlah_9, sqrdmlah(v
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| H A D | test-simulator-aarch64.cc | 4659 DEFINE_TEST_NEON_3SAME_HS(sqrdmlah, Basic)
4708 DEFINE_TEST_NEON_3SAME_SCALAR_HS(sqrdmlah, Basic)
4980 DEFINE_TEST_NEON_BYELEMENT(sqrdmlah, Basic, Basic, Basic)
5001 DEFINE_TEST_NEON_BYELEMENT_SCALAR(sqrdmlah, Basic, Basic, Basic)
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| H A D | test-disasm-sve-aarch64.cc | 6958 COMPARE(sqrdmlah(z27.VnB(), z28.VnB(), z19.VnB()), in TEST()
6959 "sqrdmlah z27.b, z28.b, z19.b"); in TEST()
6960 COMPARE(sqrdmlah(z27.VnD(), z28.VnD(), z19.VnD()), in TEST()
6961 "sqrdmlah z27.d, z28.d, z19.d"); in TEST()
6962 COMPARE(sqrdmlah(z27.VnH(), z28.VnH(), z19.VnH()), in TEST()
6963 "sqrdmlah z27.h, z28.h, z19.h"); in TEST()
6964 COMPARE(sqrdmlah(z27.VnS(), z28.VnS(), z19.VnS()), in TEST()
6965 "sqrdmlah z27.s, z28.s, z19.s"); in TEST()
6977 "sqrdmlah z31.d, z29.d, z26.d\n" in TEST()
6981 "sqrdmlah z3 in TEST()
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| /third_party/vixl/src/aarch64/ |
| H A D | macro-assembler-sve-aarch64.cc | 1836 V(Sqrdmlah, sqrdmlah, FourRegDestructiveHelper) \
1872 V(Sqrdmlah, sqrdmlah, FourRegOneImmDestructiveHelper) \
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| H A D | assembler-aarch64.h | 3391 void sqrdmlah(const VRegister& vd, const VRegister& vn, const VRegister& vm);
3435 void sqrdmlah(const VRegister& vd,
6431 void sqrdmlah(const ZRegister& zda,
6438 void sqrdmlah(const ZRegister& zda, const ZRegister& zn, const ZRegister& zm);
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| H A D | simulator-aarch64.h | 3579 LogicVRegister sqrdmlah(VectorFormat vform,
4386 LogicVRegister sqrdmlah(VectorFormat vform,
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| H A D | simulator-aarch64.cc | 3005 sqrdmlah(vform, zda, zn, (index >= 0) ? zm_idx : zm); in Simulator()
7688 sqrdmlah(vf, rd, rn, rm); in Simulator()
8159 sqrdmlah(vform, rd, rn, rm, index); in Simulator()
9144 sqrdmlah(vf, rd, rn, rm); in Simulator()
9189 Op = &Simulator::sqrdmlah; in Simulator()
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| H A D | logic-aarch64.cc | 877 LogicVRegister Simulator::sqrdmlah(VectorFormat vform, in sqrdmlah() function in vixl::aarch64::Simulator
884 return sqrdmlah(vform, dst, src1, dup_element(indexform, temp, src2, index)); in sqrdmlah()
4216 LogicVRegister Simulator::sqrdmlah(VectorFormat vform,
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| H A D | assembler-aarch64.cc | 4334 void Assembler::sqrdmlah(const VRegister& vd,
4767 V(sqrdmlah, NEON_SQRDMLAH_byelement) \
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| H A D | assembler-sve-aarch64.cc | 8336 void Assembler::sqrdmlah(const ZRegister& zda, in sqrdmlah() function in vixl::aarch64::Assembler
8358 void Assembler::sqrdmlah(const ZRegister& zda, in sqrdmlah() function in vixl::aarch64::Assembler
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| H A D | macro-assembler-aarch64.h | 2930 V(sqrdmlah, Sqrdmlah) \
3120 V(sqrdmlah, Sqrdmlah) \
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