| /third_party/vixl/test/aarch64/ |
| H A D | test-trace-aarch64.cc | 1460 __ smaxp(v12.V16B(), v14.V16B(), v7.V16B()); in GenerateTestSequenceNEON()
1461 __ smaxp(v31.V2S(), v24.V2S(), v6.V2S()); in GenerateTestSequenceNEON()
1462 __ smaxp(v10.V4H(), v29.V4H(), v10.V4H()); in GenerateTestSequenceNEON()
1463 __ smaxp(v18.V4S(), v11.V4S(), v7.V4S()); in GenerateTestSequenceNEON()
1464 __ smaxp(v21.V8B(), v0.V8B(), v18.V8B()); in GenerateTestSequenceNEON()
1465 __ smaxp(v26.V8H(), v8.V8H(), v15.V8H()); in GenerateTestSequenceNEON()
|
| H A D | test-cpu-features-aarch64.cc | 1664 TEST_NEON(smaxp_0, smaxp(v0.V8B(), v1.V8B(), v2.V8B()))
1665 TEST_NEON(smaxp_1, smaxp(v0.V16B(), v1.V16B(), v2.V16B()))
1666 TEST_NEON(smaxp_2, smaxp(v0.V4H(), v1.V4H(), v2.V4H()))
1667 TEST_NEON(smaxp_3, smaxp(v0.V8H(), v1.V8H(), v2.V8H()))
1668 TEST_NEON(smaxp_4, smaxp(v0.V2S(), v1.V2S(), v2.V2S()))
1669 TEST_NEON(smaxp_5, smaxp(v0.V4S(), v1.V4S(), v2.V4S()))
|
| H A D | test-api-movprfx-aarch64.cc | 2112 __ smaxp(z5.VnB(), p4.Merging(), z5.VnB(), z10.VnB()); in TEST()
2958 __ smaxp(z5.VnB(), p4.Merging(), z5.VnB(), z10.VnB()); in TEST()
3302 __ smaxp(z5.VnB(), p4.Merging(), z5.VnB(), z5.VnB()); in TEST()
|
| H A D | test-disasm-sve-aarch64.cc | 6854 COMPARE(smaxp(z5.VnB(), p4.Merging(), z5.VnB(), z10.VnB()), in TEST()
6855 "smaxp z5.b, p4/m, z5.b, z10.b"); in TEST()
6856 COMPARE(smaxp(z5.VnD(), p4.Merging(), z5.VnD(), z10.VnD()), in TEST()
6857 "smaxp z5.d, p4/m, z5.d, z10.d"); in TEST()
6858 COMPARE(smaxp(z5.VnH(), p4.Merging(), z5.VnH(), z10.VnH()), in TEST()
6859 "smaxp z5.h, p4/m, z5.h, z10.h"); in TEST()
6860 COMPARE(smaxp(z5.VnS(), p4.Merging(), z5.VnS(), z10.VnS()), in TEST()
6861 "smaxp z5.s, p4/m, z5.s, z10.s"); in TEST()
6899 "smaxp z4.b, p1/m, z4.b, z31.b"); in TEST()
|
| H A D | test-simulator-aarch64.cc | 4617 DEFINE_TEST_NEON_3SAME_NO2D(smaxp, Basic)
|
| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | assembler-arm64.h | 1188 void smaxp(const VRegister& vd, const VRegister& vn, const VRegister& vm);
|
| H A D | macro-assembler-arm64.h | 412 V(smaxp, Smaxp) \
|
| H A D | assembler-arm64.cc | 3080 V(smaxp, NEON_SMAXP, vd.IsVector() && !vd.IsLaneSizeD()) \
|
| /third_party/vixl/src/aarch64/ |
| H A D | macro-assembler-sve-aarch64.cc | 637 V(Smaxp, smaxp) \
|
| H A D | assembler-aarch64.h | 3040 void smaxp(const VRegister& vd, const VRegister& vn, const VRegister& vm);
6247 void smaxp(const ZRegister& zd,
|
| H A D | simulator-aarch64.h | 3898 LogicVRegister smaxp(VectorFormat vform,
|
| H A D | simulator-aarch64.cc | 3464 smaxp(vform, result, zdn, zm); in Simulator()
7502 smaxp(vf, rd, rn, rm); in Simulator()
|
| H A D | assembler-aarch64.cc | 4184 V(smaxp, NEON_SMAXP, vd.IsVector() && !vd.IsLaneSizeD()) \
|
| H A D | assembler-sve-aarch64.cc | 7786 void Assembler::smaxp(const ZRegister& zd, in smaxp() function in vixl::aarch64::Assembler
|
| H A D | logic-aarch64.cc | 1221 LogicVRegister Simulator::smaxp(VectorFormat vform, in smaxp() function in vixl::aarch64::Simulator
|
| H A D | macro-assembler-aarch64.h | 2911 V(smaxp, Smaxp) \
|
| /third_party/node/deps/v8/src/execution/arm64/ |
| H A D | simulator-arm64.h | 1769 LogicVRegister smaxp(VectorFormat vform, LogicVRegister dst,
|
| H A D | simulator-arm64.cc | 4332 smaxp(vf, rd, rn, rm);
|
| H A D | simulator-logic-arm64.cc | 1149 LogicVRegister Simulator::smaxp(VectorFormat vform, LogicVRegister dst, in smaxp() function in v8::internal::Simulator
|