| /third_party/vixl/test/aarch64/ |
| H A D | test-trace-aarch64.cc | 1440 __ shsub(v30.V16B(), v22.V16B(), v23.V16B()); in GenerateTestSequenceNEON()
1441 __ shsub(v22.V2S(), v27.V2S(), v25.V2S()); in GenerateTestSequenceNEON()
1442 __ shsub(v13.V4H(), v22.V4H(), v1.V4H()); in GenerateTestSequenceNEON()
1443 __ shsub(v10.V4S(), v8.V4S(), v23.V4S()); in GenerateTestSequenceNEON()
1444 __ shsub(v6.V8B(), v9.V8B(), v31.V8B()); in GenerateTestSequenceNEON()
1445 __ shsub(v8.V8H(), v31.V8H(), v8.V8H()); in GenerateTestSequenceNEON()
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| H A D | test-cpu-features-aarch64.cc | 1650 TEST_NEON(shsub_0, shsub(v0.V8B(), v1.V8B(), v2.V8B()))
1651 TEST_NEON(shsub_1, shsub(v0.V16B(), v1.V16B(), v2.V16B()))
1652 TEST_NEON(shsub_2, shsub(v0.V4H(), v1.V4H(), v2.V4H()))
1653 TEST_NEON(shsub_3, shsub(v0.V8H(), v1.V8H(), v2.V8H()))
1654 TEST_NEON(shsub_4, shsub(v0.V2S(), v1.V2S(), v2.V2S()))
1655 TEST_NEON(shsub_5, shsub(v0.V4S(), v1.V4S(), v2.V4S()))
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| H A D | test-api-movprfx-aarch64.cc | 2106 __ shsub(z21.VnB(), p0.Merging(), z21.VnB(), z0.VnB()); in TEST()
3296 __ shsub(z21.VnB(), p0.Merging(), z21.VnB(), z21.VnB()); in TEST()
3604 __ shsub(z21.VnB(), p0.Merging(), z21.VnB(), z0.VnB()); in TEST()
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| H A D | test-disasm-sve-aarch64.cc | 6304 COMPARE(shsub(z21.VnB(), p0.Merging(), z21.VnB(), z0.VnB()), in TEST()
6305 "shsub z21.b, p0/m, z21.b, z0.b"); in TEST()
6306 COMPARE(shsub(z21.VnD(), p0.Merging(), z21.VnD(), z0.VnD()), in TEST()
6307 "shsub z21.d, p0/m, z21.d, z0.d"); in TEST()
6308 COMPARE(shsub(z21.VnH(), p0.Merging(), z21.VnH(), z0.VnH()), in TEST()
6309 "shsub z21.h, p0/m, z21.h, z0.h"); in TEST()
6310 COMPARE(shsub(z21.VnS(), p0.Merging(), z21.VnS(), z0.VnS()), in TEST()
6311 "shsub z21.s, p0/m, z21.s, z0.s"); in TEST()
6384 "shsub z0.b, p0/m, z0.b, z1.b"); in TEST()
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| H A D | test-simulator-aarch64.cc | 4601 DEFINE_TEST_NEON_3SAME_NO2D(shsub, Basic)
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| /third_party/ffmpeg/libavcodec/aarch64/ |
| H A D | h264dsp_neon.S | 808 weight_\w shsub
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| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | assembler-arm64.h | 1979 void shsub(const VRegister& vd, const VRegister& vn, const VRegister& vm);
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| H A D | macro-assembler-arm64.h | 411 V(shsub, Shsub) \
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| H A D | assembler-arm64.cc | 3077 V(shsub, NEON_SHSUB, vd.IsVector() && !vd.IsLaneSizeD()) \
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| /third_party/vixl/src/aarch64/ |
| H A D | macro-assembler-sve-aarch64.cc | 673 V(Shsub, shsub) \
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| H A D | assembler-aarch64.h | 2521 void shsub(const VRegister& vd, const VRegister& vn, const VRegister& vm);
6232 void shsub(const ZRegister& zd,
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| H A D | assembler-aarch64.cc | 4181 V(shsub, NEON_SHSUB, vd.IsVector() && !vd.IsLaneSizeD()) \
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| H A D | assembler-sve-aarch64.cc | 7741 void Assembler::shsub(const ZRegister& zd, in shsub() function in vixl::aarch64::Assembler
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| H A D | macro-assembler-aarch64.h | 2909 V(shsub, Shsub) \
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