/third_party/node/deps/openssl/openssl/crypto/camellia/asm/ |
H A D | cmll-x86.pl | 475 # shld is very slow on Intel P4 family. Even on AMD it limits 485 &shld ($i0,$i1,$rot); 486 &shld ($i1,$i2,$rot); 487 &shld ($i2,$i3,$rot); 488 &shld ($i3,$idx,$rot); 496 # ... Implementing 128-bit rotate without shld gives >3x performance
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H A D | cmll-x86_64.pl | 406 # shld is very slow on Intel EM64T family. Even on AMD it limits 415 shld \$$rot,$i1,$i0 416 shld \$$rot,%r11,$i1 421 # ... Implementing 128-bit rotate without shld gives 80% better
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/third_party/openssl/crypto/camellia/asm/ |
H A D | cmll-x86.pl | 475 # shld is very slow on Intel P4 family. Even on AMD it limits 485 &shld ($i0,$i1,$rot); 486 &shld ($i1,$i2,$rot); 487 &shld ($i2,$i3,$rot); 488 &shld ($i3,$idx,$rot); 496 # ... Implementing 128-bit rotate without shld gives >3x performance
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H A D | cmll-x86_64.pl | 406 # shld is very slow on Intel EM64T family. Even on AMD it limits 415 shld \$$rot,$i1,$i0 416 shld \$$rot,%r11,$i1 421 # ... Implementing 128-bit rotate without shld gives 80% better
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/third_party/mesa3d/src/mesa/x86/ |
H A D | assyntax.h | 648 #define SHLD_L(a,b,c) CHOICE(shldl ARG3(a,b,c), shldl ARG3(a,b,c), _LTOG shld ARG3(c,b,a)) 649 #define SHLD2_L(a,b) CHOICE(shldl ARG2(a,b), shldl ARG3(CL,a,b), _LTOG shld ARG3(b,a,CL)) 650 #define SHLD_W(a,b,c) CHOICE(shldw ARG3(a,b,c), shldw ARG3(a,b,c), _WTOG shld ARG3(c,b,a)) 651 #define SHLD2_W(a,b) CHOICE(shldw ARG2(a,b), shldw ARG3(CL,a,b), _WTOG shld ARG3(b,a,CL)) 1361 #define SHLD_L(a,b,c) shld 1362 #define SHLD2_L(a,b) shld L_(b), L_(a) 1363 #define SHLD_W(a,b,c) shld 1364 #define SHLD2_W(a,b) shld W_(b), W_(a)
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/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
H A D | IceAssemblerX8632.h | 815 void shld(Type Ty, GPRRegister dst, GPRRegister src); 816 void shld(Type Ty, GPRRegister dst, GPRRegister src, const Immediate &imm); 817 void shld(Type Ty, const AsmAddress &operand, GPRRegister src);
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H A D | IceAssemblerX8664.h | 811 void shld(Type Ty, GPRRegister dst, GPRRegister src); 812 void shld(Type Ty, GPRRegister dst, GPRRegister src, const Immediate &imm); 813 void shld(Type Ty, const AsmAddress &operand, GPRRegister src);
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H A D | IceAssemblerX8632.cpp | 2599 void AssemblerX8632::shld(Type Ty, GPRRegister dst, GPRRegister src) { 2609 void AssemblerX8632::shld(Type Ty, GPRRegister dst, GPRRegister src, 2622 void AssemblerX8632::shld(Type Ty, const AsmAddress &operand, GPRRegister src) {
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H A D | IceAssemblerX8664.cpp | 2738 void AssemblerX8664::shld(Type Ty, GPRRegister dst, GPRRegister src) { 2749 void AssemblerX8664::shld(Type Ty, GPRRegister dst, GPRRegister src, 2763 void AssemblerX8664::shld(Type Ty, const AsmAddress &operand, GPRRegister src) {
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H A D | IceInstX8632.cpp | 1287 "shld" in emit() 1302 static const GPREmitterShiftD Emitter = {&Assembler::shld, &Assembler::shld}; in emitIAS() 1311 Str << " = shld." << this->getDest()->getType() << " "; in dump()
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H A D | IceInstX8664.cpp | 1290 "shld" in emit() 1305 static const GPREmitterShiftD Emitter = {&Assembler::shld, &Assembler::shld}; in emitIAS() 1314 Str << " = shld." << this->getDest()->getType() << " "; in dump()
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/third_party/node/deps/openssl/openssl/crypto/sha/asm/ |
H A D | sha1-586.pl | 1115 my $_rol=sub { &shld(@_[0],@_) };
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H A D | sha1-x86_64.pl | 975 my $_rol=sub { &shld(@_[0],@_) };
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/third_party/openssl/crypto/sha/asm/ |
H A D | sha1-586.pl | 1115 my $_rol=sub { &shld(@_[0],@_) };
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H A D | sha1-x86_64.pl | 975 my $_rol=sub { &shld(@_[0],@_) };
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/third_party/node/deps/v8/src/codegen/ia32/ |
H A D | macro-assembler-ia32.cc | 644 shld(high, low, shift); in CallRecordWriteStub()
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H A D | assembler-ia32.h | 676 void shld(Register dst, Register src, uint8_t shift);
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H A D | assembler-ia32.cc | 1226 void Assembler::shld(Register dst, Register src, uint8_t shift) { in shld() function in v8::internal::Assembler
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/third_party/node/deps/openssl/openssl/crypto/aes/asm/ |
H A D | aesni-sha1-x86_64.pl | 1067 my $_rol=sub { &shld(@_[0],@_) };
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/third_party/openssl/crypto/aes/asm/ |
H A D | aesni-sha1-x86_64.pl | 1067 my $_rol=sub { &shld(@_[0],@_) };
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/third_party/skia/third_party/externals/swiftshader/third_party/subzero/unittest/AssemblerX8632/ |
H A D | GPRArith.cpp | 1585 TestImplThreeOperandOp(shld, Dst, Value0, Src, Value1, Count, <<, >>, \ in TEST_F()
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/third_party/skia/third_party/externals/swiftshader/third_party/subzero/unittest/AssemblerX8664/ |
H A D | GPRArith.cpp | 1564 TestImplThreeOperandOp(shld, Dst, Value0, Src, Value1, Count, <<, >>, \ in TEST_F()
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/third_party/node/deps/v8/src/codegen/x64/ |
H A D | assembler-x64.cc | 2164 void Assembler::shld(Register dst, Register src) { in shld() function in v8::internal::Assembler
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H A D | assembler-x64.h | 723 void shld(Register dst, Register src);
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