Searched refs:sel0 (Results 1 - 6 of 6) sorted by relevance
| /third_party/ltp/tools/sparse/sparse-src/validation/optim/ |
| H A D | select-zero.c | 1 static int sel0(int a) in sel0() function
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| /third_party/mesa3d/src/amd/common/ |
| H A D | ac_spm.c | 97 cntr_sel->sel0 |= S_036700_PERF_SEL(counter->event_id) | in ac_spm_map_counter()
119 cntr_sel->sel0 |= S_037004_PERF_SEL(counter->event_id) | in ac_spm_map_counter()
124 cntr_sel->sel0 |= S_037004_PERF_SEL1(counter->event_id) | in ac_spm_map_counter()
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| H A D | ac_spm.h | 81 uint32_t sel0; member
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| /third_party/mesa3d/src/amd/vulkan/ |
| H A D | radv_spm.c | 74 radeon_emit(cs, cntr_sel->sel0 | S_036700_SQC_BANK_MASK(0xf)); /* SQC_BANK_MASK only gfx10 */ in radv_emit_spm_counters()
90 radeon_emit(cs, cntr_sel->sel0); in radv_emit_spm_counters()
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| /third_party/mesa3d/src/gallium/drivers/radeonsi/ |
| H A D | si_perfcounter.c | 760 radeon_emit(cntr_sel->sel0 | S_036700_SQC_BANK_MASK(0xf)); /* SQC_BANK_MASK only gfx10 */ in si_emit_spm_counters()
776 radeon_emit(cntr_sel->sel0); in si_emit_spm_counters()
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| /third_party/mesa3d/src/gallium/auxiliary/gallivm/ |
| H A D | lp_bld_sample.c | 1737 * Returns sel1 ? val2 : (sel0 ? val0 : val1).
1741 LLVMValueRef sel0, in lp_build_select3()
1748 tmp = lp_build_select(sel_bld, sel0, val0, val1); in lp_build_select3()
1740 lp_build_select3(struct lp_build_context *sel_bld, LLVMValueRef sel0, LLVMValueRef sel1, LLVMValueRef val0, LLVMValueRef val1, LLVMValueRef val2) lp_build_select3() argument
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