Searched refs:saddv (Results 1 - 7 of 7) sorted by relevance
| /third_party/vixl/src/aarch64/ |
| H A D | simulator-aarch64.h | 4755 LogicVRegister saddv(VectorFormat vform,
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| H A D | assembler-aarch64.h | 5269 void saddv(const VRegister& dd, const PRegister& pg, const ZRegister& zn);
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| H A D | assembler-sve-aarch64.cc | 3298 void Assembler::saddv(const VRegister& dd, in saddv() function in vixl::aarch64::Assembler
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| H A D | logic-aarch64.cc | 2159 LogicVRegister Simulator::saddv(VectorFormat vform,
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| H A D | macro-assembler-aarch64.h | 5798 saddv(dd, pg, zn); in Saddv()
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| H A D | simulator-aarch64.cc | 11675 saddv(vform, vd, pg, zn); in Simulator()
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| /third_party/vixl/test/aarch64/ |
| H A D | test-disasm-sve-aarch64.cc | 2922 COMPARE(saddv(d20, p1, z12.VnB()), "saddv d20, p1, z12.b"); in TEST()
2923 COMPARE(saddv(d22, p3, z15.VnH()), "saddv d22, p3, z15.h"); in TEST()
2924 COMPARE(saddv(d24, p5, z18.VnS()), "saddv d24, p5, z18.s"); in TEST()
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