/third_party/ffmpeg/libavcodec/aarch64/ |
H A D | me_cmp_neon.S | 118 rshrn2 v23.16b, v24.8h, #2 // shift right 2 8..15 125 rshrn2 v26.16b, v27.8h, #2 // shift right 2 8..15 132 rshrn2 v28.16b, v29.8h, #2 // shift right 2 8..15 139 rshrn2 v30.16b, v31.8h, #2 // shift right 2 8..15
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H A D | vp9itxfm_16bpp_neon.S | 112 rshrn2 \out1\().4s, \tmp4\().2d, #14 116 rshrn2 \out2\().4s, \tmp4\().2d, #14 121 rshrn2 \out1\().4s, \tmp4\().2d, #14 123 rshrn2 \out2\().4s, \tmp6\().2d, #14 133 rshrn2 \out1\().4s, \tmp2\().2d, #14 135 rshrn2 \out2\().4s, \tmp2\().2d, #14 162 rshrn2 \inout1\().4s, \tmp2\().2d, #14 164 rshrn2 \inout2\().4s, \tmp4\().2d, #14 174 rshrn2 \inout1\().4s, \tmp2\().2d, #14 176 rshrn2 \inout [all...] |
H A D | vp9itxfm_neon.S | 63 rshrn2 \out1\().8h, \tmp4\().4s, #14 67 rshrn2 \out2\().8h, \tmp4\().4s, #14 72 rshrn2 \out1\().8h, \tmp4\().4s, #14 74 rshrn2 \out2\().8h, \tmp6\().4s, #14 84 rshrn2 \out1\().8h, \tmp2\().4s, #14 86 rshrn2 \out2\().8h, \tmp2\().4s, #14 113 rshrn2 \inout1\().8h, \tmp2\().4s, #14 115 rshrn2 \inout2\().8h, \tmp4\().4s, #14 125 rshrn2 \inout1\().8h, \tmp2\().4s, #14 127 rshrn2 \inout [all...] |
H A D | h264dsp_neon.S | 91 rshrn2 v4.16B, v20.8H, #3 227 rshrn2 v24.16b, v21.8h, #2 // p0'_1 228 rshrn2 v25.16b, v23.8h, #2 // q0'_1 257 rshrn2 v20.16b, v21.8h, #3 // p0'_2 261 rshrn2 v21.16b, v27.8h, #2 // p1'_2 269 rshrn2 v19.16b, v29.8h, #3 // p2'_2 281 rshrn2 v22.16b, v23.8h, #3 // q0'_2 285 rshrn2 v23.16b, v27.8h, #2 // q1'_2 293 rshrn2 v26.16b, v29.8h, #3 // q2'_2
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H A D | vp8dsp_neon.S | 1524 rshrn2 v4.16b, v6.8h, #3 1526 rshrn2 v6.16b, v24.8h, #3 1554 rshrn2 v4.16b, v16.8h, #3 1556 rshrn2 v6.16b, v20.8h, #3 1582 rshrn2 v4.16b, v18.8h, #3 1600 rshrn2 v6.16b, v24.8h, #3 1606 rshrn2 v4.16b, v18.8h, #3 1612 rshrn2 v24.16b, v30.8h, #3 1615 rshrn2 v20.16b, v22.8h, #3
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H A D | hpeldsp_neon.S | 331 rshrn2 \rd, \rn, \rm
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H A D | h264qpel_neon.S | 148 rshrn2 v5.8H, v1.4S, #10
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H A D | vp9lpf_neon.S | 141 rshrn2 \dst\().16b, \in2, \shift
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/third_party/node/deps/v8/src/execution/arm64/ |
H A D | simulator-logic-arm64.cc | 2135 LogicVRegister Simulator::rshrn2(VectorFormat vform, LogicVRegister dst, in rshrn2() function in v8::internal::Simulator 2246 return rshrn2(vform, dst, src, shift).UnsignedSaturate(vform); in uqrshrn2() 2786 rshrn2(vform, dst, temp, LaneSizeInBitsFromFormat(vform)); in raddhn2() 2822 rshrn2(vform, dst, temp, LaneSizeInBitsFromFormat(vform)); in rsubhn2()
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H A D | simulator-arm64.h | 1963 LogicVRegister rshrn2(VectorFormat vform, LogicVRegister dst,
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H A D | simulator-arm64.cc | 5921 rshrn2(vf, rd, rn, right_shift);
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/third_party/vixl/src/aarch64/ |
H A D | logic-aarch64.cc | 3232 LogicVRegister Simulator::rshrn2(VectorFormat vform, 3380 return rshrn2(vform, dst, src, shift).UnsignedSaturate(vform); 4281 rshrn2(vform, dst, temp, LaneSizeInBitsFromFormat(vform)); 4325 rshrn2(vform, dst, temp, LaneSizeInBitsFromFormat(vform));
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H A D | simulator-aarch64.h | 4280 LogicVRegister rshrn2(VectorFormat vform,
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H A D | assembler-aarch64.h | 3252 void rshrn2(const VRegister& vd, const VRegister& vn, int shift);
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H A D | assembler-aarch64.cc | 5710 void Assembler::rshrn2(const VRegister& vd, const VRegister& vn, int shift) {
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H A D | macro-assembler-aarch64.h | 3159 V(rshrn2, Rshrn2) \
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H A D | simulator-aarch64.cc | 9508 rshrn2(vf, rd, rn, right_shift); in Simulator()
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/third_party/node/deps/v8/src/codegen/arm64/ |
H A D | assembler-arm64.h | 1381 void rshrn2(const VRegister& vd, const VRegister& vn, int shift);
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H A D | macro-assembler-arm64.h | 1216 V(rshrn2, Rshrn2) \
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H A D | assembler-arm64.cc | 1754 void Assembler::rshrn2(const VRegister& vd, const VRegister& vn, int shift) { in rshrn2() function in v8::internal::Assembler
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/third_party/vixl/test/aarch64/ |
H A D | test-trace-aarch64.cc | 1352 __ rshrn2(v3.V16B(), v6.V8H(), 8); in GenerateTestSequenceNEON() 1353 __ rshrn2(v0.V4S(), v29.V2D(), 25); in GenerateTestSequenceNEON() 1354 __ rshrn2(v27.V8H(), v26.V4S(), 15); in GenerateTestSequenceNEON()
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H A D | test-cpu-features-aarch64.cc | 1562 TEST_NEON(rshrn2_0, rshrn2(v0.V16B(), v1.V8H(), 1)) 1563 TEST_NEON(rshrn2_1, rshrn2(v0.V8H(), v1.V4S(), 6)) 1564 TEST_NEON(rshrn2_2, rshrn2(v0.V4S(), v1.V2D(), 12))
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