| /third_party/ffmpeg/libavcodec/aarch64/ |
| H A D | h264cmc_neon.S | 80 rshrn v16.8B, v16.8H, #6
81 rshrn v17.8B, v17.8H, #6
115 rshrn v16.8B, v16.8H, #6
116 rshrn v17.8B, v17.8H, #6
148 rshrn v16.8B, v16.8H, #6
149 rshrn v17.8B, v17.8H, #6
175 rshrn v16.8B, v16.8H, #6
176 rshrn v17.8B, v17.8H, #6
252 rshrn v16.8B, v18.8H, #6
289 rshrn v1
[all...] |
| H A D | me_cmp_neon.S | 117 rshrn v23.8b, v23.8h, #2 // shift right 2 0..7 (rounding shift right)
124 rshrn v26.8b, v26.8h, #2 // shift right 2 0..7 (rounding shift right)
131 rshrn v28.8b, v28.8h, #2 // shift right 2 0..7 (rounding shift right)
138 rshrn v30.8b, v30.8h, #2 // shift right 2 0..7 (rounding shift right)
|
| H A D | vp9itxfm_neon.S | 62 rshrn \out1\().4h, \tmp3\().4s, #14
66 rshrn \out2\().4h, \tmp3\().4s, #14
71 rshrn \out1\().4h, \tmp3\().4s, #14
73 rshrn \out2\().4h, \tmp5\().4s, #14
83 rshrn \out1\().4h, \tmp1\().4s, #14
85 rshrn \out2\().4h, \tmp1\().4s, #14
112 rshrn \inout1\().4h, \tmp1\().4s, #14
114 rshrn \inout2\().4h, \tmp3\().4s, #14
124 rshrn \inout1\().4h, \tmp1\().4s, #14
126 rshrn \inout
[all...] |
| H A D | h264pred_neon.S | 57 rshrn v0.8b, v0.8h, #4
66 rshrn v0.8b, v0.8h, #4
79 rshrn v0.8b, v0.8h, #5
135 rshrn v4.4h, v2.4s, #6
218 rshrn v5.4h, v2.4s, #5
254 rshrn v2.8b, v0.8h, #2
265 rshrn v2.8b, v0.8h, #2
282 rshrn v6.8b, v5.8h, #3
283 rshrn v7.8b, v4.8h, #2
309 rshrn v
[all...] |
| H A D | vp8dsp_neon.S | 1523 rshrn v4.8b, v16.8h, #3
1525 rshrn v6.8b, v22.8h, #3
1553 rshrn v4.8b, v6.8h, #3
1555 rshrn v6.8b, v18.8h, #3
1581 rshrn v4.8b, v16.8h, #3
1599 rshrn v6.8b, v22.8h, #3
1605 rshrn v4.8b, v16.8h, #3
1611 rshrn v24.8b, v24.8h, #3
1614 rshrn v20.8b, v20.8h, #3
1637 rshrn v
[all...] |
| H A D | vp9itxfm_16bpp_neon.S | 111 rshrn \out1\().2s, \tmp3\().2d, #14
115 rshrn \out2\().2s, \tmp3\().2d, #14
120 rshrn \out1\().2s, \tmp3\().2d, #14
122 rshrn \out2\().2s, \tmp5\().2d, #14
132 rshrn \out1\().2s, \tmp1\().2d, #14
134 rshrn \out2\().2s, \tmp1\().2d, #14
161 rshrn \inout1\().2s, \tmp1\().2d, #14
163 rshrn \inout2\().2s, \tmp3\().2d, #14
173 rshrn \inout1\().2s, \tmp1\().2d, #14
175 rshrn \inout
[all...] |
| H A D | h264dsp_neon.S | 90 rshrn v4.8B, v4.8H, #3
225 rshrn v24.8b, v20.8h, #2 // p0'_1
226 rshrn v25.8b, v22.8h, #2 // q0'_1
256 rshrn v20.8b, v20.8h, #3 // p0'_2
260 rshrn v21.8b, v26.8h, #2 // p1'_2
268 rshrn v19.8b, v28.8h, #3 // p2'_2
280 rshrn v22.8b, v22.8h, #3 // q0'_2
284 rshrn v23.8b, v26.8h, #2 // q1'_2
292 rshrn v26.8b, v28.8h, #3 // q2'_2
399 rshrn v
[all...] |
| H A D | hpeldsp_neon.S | 328 rshrn \rd, \rn, \rm
|
| H A D | h264qpel_neon.S | 147 rshrn v5.4H, v5.4S, #10
|
| H A D | vp9lpf_neon.S | 139 rshrn \dst\().8b, \in1, \shift
|
| /third_party/node/deps/v8/src/execution/arm64/ |
| H A D | simulator-logic-arm64.cc | 2126 LogicVRegister Simulator::rshrn(VectorFormat vform, LogicVRegister dst, in rshrn() function in v8::internal::Simulator
2241 return rshrn(vform, dst, src, shift).UnsignedSaturate(vform); in uqrshrn()
2777 rshrn(vform, dst, temp, LaneSizeInBitsFromFormat(vform)); in raddhn()
2813 rshrn(vform, dst, temp, LaneSizeInBitsFromFormat(vform)); in rsubhn()
|
| H A D | simulator-arm64.h | 1961 LogicVRegister rshrn(VectorFormat vform, LogicVRegister dst,
|
| H A D | simulator-arm64.cc | 5923 rshrn(vf, rd, rn, right_shift);
|
| /third_party/vixl/src/aarch64/ |
| H A D | logic-aarch64.cc | 3220 LogicVRegister Simulator::rshrn(VectorFormat vform,
3372 return rshrn(vform, dst, src, shift).UnsignedSaturate(vform);
4270 rshrn(vform, dst, temp, LaneSizeInBitsFromFormat(vform));
4314 rshrn(vform, dst, temp, LaneSizeInBitsFromFormat(vform));
|
| H A D | simulator-aarch64.h | 4276 LogicVRegister rshrn(VectorFormat vform,
|
| H A D | simulator-aarch64.cc | 2675 rshrn(vform, result, zn, right_shift_dist); in Simulator()
9510 rshrn(vf, rd, rn, right_shift); in Simulator()
|
| H A D | assembler-aarch64.h | 3249 void rshrn(const VRegister& vd, const VRegister& vn, int shift);
|
| H A D | assembler-aarch64.cc | 5703 void Assembler::rshrn(const VRegister& vd, const VRegister& vn, int shift) {
|
| H A D | macro-assembler-aarch64.h | 3158 V(rshrn, Rshrn) \
|
| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | assembler-arm64.h | 1378 void rshrn(const VRegister& vd, const VRegister& vn, int shift);
|
| H A D | macro-assembler-arm64.h | 1215 V(rshrn, Rshrn) \
|
| H A D | assembler-arm64.cc | 1749 void Assembler::rshrn(const VRegister& vd, const VRegister& vn, int shift) { in rshrn() function in v8::internal::Assembler
|
| /third_party/vixl/test/aarch64/ |
| H A D | test-trace-aarch64.cc | 1349 __ rshrn(v18.V2S(), v13.V2D(), 1); in GenerateTestSequenceNEON()
1350 __ rshrn(v25.V4H(), v30.V4S(), 2); in GenerateTestSequenceNEON()
1351 __ rshrn(v13.V8B(), v9.V8H(), 8); in GenerateTestSequenceNEON()
|
| H A D | test-cpu-features-aarch64.cc | 1559 TEST_NEON(rshrn_0, rshrn(v0.V8B(), v1.V8H(), 6))
1560 TEST_NEON(rshrn_1, rshrn(v0.V4H(), v1.V4S(), 9))
1561 TEST_NEON(rshrn_2, rshrn(v0.V2S(), v1.V2D(), 30))
|
| H A D | test-simulator-aarch64.cc | 4780 DEFINE_TEST_NEON_2OPIMM_NARROW(rshrn, Basic, TypeWidth)
|