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Searched refs:regclasses (Results 1 - 10 of 10) sorted by relevance

/third_party/mesa3d/src/amd/compiler/
H A Daco_instruction_selection_setup.cpp466 RegClass* regclasses = ctx->program->temp_rc.data() + ctx->first_temp_id; in init_context() local
579 if (regclasses[alu_instr->src[i].src.ssa->index].type() == RegType::vgpr) in init_context()
587 regclasses[alu_instr->dest.dest.ssa.index] = rc; in init_context()
594 regclasses[nir_instr_as_load_const(instr)->def.index] = rc; in init_context()
740 if (regclasses[intrinsic->src[i].ssa->index].type() == RegType::vgpr) in init_context()
747 regclasses[intrinsic->dest.ssa.index] = rc; in init_context()
760 regclasses[tex->dest.ssa.index] = rc; in init_context()
765 regclasses[entry->dest.ssa.index] = regclasses[entry->src.ssa->index]; in init_context()
773 regclasses[nir_instr_as_ssa_unde in init_context()
[all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
H A DResourcePriorityQueue.cpp59 for (const TargetRegisterClass *RC : TRI->regclasses()) in ResourcePriorityQueue()
360 for (const TargetRegisterClass *RC : TRI->regclasses()) in regPressureDelta()
364 for (const TargetRegisterClass *RC : TRI->regclasses()) { in regPressureDelta()
H A DScheduleDAGRRList.cpp1767 for (const TargetRegisterClass *RC : TRI->regclasses())
2073 for (const TargetRegisterClass *RC : TRI->regclasses()) {
H A DTargetLowering.cpp4197 for (const TargetRegisterClass *RC : RI->regclasses()) { in getRegForInlineAsmConstraint()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
H A DRegisterClassInfo.cpp39 cl::desc("Limit all regclasses to N registers"));
172 for (const TargetRegisterClass *C : TRI->regclasses()) { in computePSetLimit()
H A DTargetRegisterInfo.cpp197 for (const TargetRegisterClass* RC : regclasses()) {
226 for (const TargetRegisterClass *C : regclasses())
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
H A DTargetRegisterInfo.h242 regclass_iterator RegClassBegin, RegClassEnd; // List of regclasses
661 iterator_range<regclass_iterator> regclasses() const {
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/
H A DMCRegisterInfo.h526 iterator_range<regclass_iterator> regclasses() const {
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
H A DRDFRegisters.cpp33 for (const TargetRegisterClass *RC : TRI.regclasses()) { in PhysicalRegisterInfo()
H A DHexagonBlockRanges.cpp224 for (const TargetRegisterClass *RC : TRI.regclasses()) { in HexagonBlockRanges()

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