| /third_party/ffmpeg/libavcodec/loongarch/ |
| H A D | vp9_idct_lsx.c | 376 __m128i reg0, reg2, reg4, reg6, reg8, reg10, reg12, reg14; in vp9_idct16_1d_columns_addblk_lsx() local
387 reg8, reg9, reg10, reg11); in vp9_idct16_1d_columns_addblk_lsx()
412 VP9_DOTP_CONST_PAIR(reg0, reg8, cospi_16_64, cospi_16_64, reg0, reg8); in vp9_idct16_1d_columns_addblk_lsx()
414 LSX_BUTTERFLY_4_H(reg8, reg0, reg4, reg12, reg2, reg6, reg10, reg14); in vp9_idct16_1d_columns_addblk_lsx()
422 reg8 = __lsx_vsub_h(reg10, loc2); in vp9_idct16_1d_columns_addblk_lsx()
467 LSX_BUTTERFLY_4_H(reg8, reg10, reg11, reg5, loc0, reg4, reg9, loc1); in vp9_idct16_1d_columns_addblk_lsx()
473 LSX_BUTTERFLY_4_H(reg12, reg14, reg13, reg3, reg8, reg6, reg7, reg5); in vp9_idct16_1d_columns_addblk_lsx()
485 DUP4_ARG2(__lsx_vsrari_h, reg8, 6, reg10, 6, reg12, 6, reg14, 6, in vp9_idct16_1d_columns_addblk_lsx()
486 reg8, reg1 in vp9_idct16_1d_columns_addblk_lsx()
502 __m128i reg0, reg2, reg4, reg6, reg8, reg10, reg12, reg14; vp9_idct16_1d_columns_lsx() local
[all...] |
| H A D | vp9_mc_lsx.c | 590 __m128i reg6, reg7, reg8, reg9, reg10, reg11; in common_vt_8t_16w_lsx() local
614 reg6, reg7, reg8, reg9); in common_vt_8t_16w_lsx()
632 tmp2 = FILT_8TAP_DPADD_S_H(reg6, reg7, reg8, src4, filter0, filter1, in common_vt_8t_16w_lsx()
646 tmp2 = FILT_8TAP_DPADD_S_H(reg7, reg8, src4, src7, filter0, filter1, in common_vt_8t_16w_lsx()
663 reg6 = reg8; in common_vt_8t_16w_lsx()
665 reg8 = src7; in common_vt_8t_16w_lsx()
684 __m128i reg6, reg7, reg8, reg9, reg10, reg11; in common_vt_8t_16w_mult_lsx() local
720 reg6, reg7, reg8, reg9); in common_vt_8t_16w_mult_lsx()
739 tmp2 = FILT_8TAP_DPADD_S_H(reg6, reg7, reg8, src4, filter0, in common_vt_8t_16w_mult_lsx()
752 tmp2 = FILT_8TAP_DPADD_S_H(reg7, reg8, src in common_vt_8t_16w_mult_lsx()
1706 __m128i reg6, reg7, reg8, reg9, reg10, reg11; common_vt_8t_and_aver_dst_16w_mult_lsx() local
[all...] |
| /third_party/vixl/src/aarch64/ |
| H A D | registers-aarch64.h | 980 const CPURegister& reg8 = NoReg) {
989 const CPURegister regs[] = {reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8};
1036 const CPURegister& reg8 = NoCPUReg) {
1045 match &= !reg8.IsValid() || reg8.IsSameSizeAndType(reg1);
1060 const CPURegister& reg8 = NoReg) {
1069 even &= !reg8.IsValid() || ((reg8.GetCode() % 2) == 0);
|
| /third_party/ffmpeg/libavcodec/mips/ |
| H A D | vp9_idct_msa.c | 967 v8i16 reg0, reg2, reg4, reg6, reg8, reg10, reg12, reg14; in vp9_idct16_1d_columns_addblk_msa() local
975 reg8, reg9, reg10, reg11, reg12, reg13, reg14, reg15); in vp9_idct16_1d_columns_addblk_msa()
985 VP9_DOTP_CONST_PAIR(reg0, reg8, cospi_16_64, cospi_16_64, reg0, reg8); in vp9_idct16_1d_columns_addblk_msa()
987 BUTTERFLY_4(reg8, reg0, reg4, reg12, reg2, reg6, reg10, reg14); in vp9_idct16_1d_columns_addblk_msa()
995 reg8 = reg10 - loc2; in vp9_idct16_1d_columns_addblk_msa()
1040 BUTTERFLY_4(reg8, reg10, reg11, reg5, loc0, reg4, reg9, loc1); in vp9_idct16_1d_columns_addblk_msa()
1046 BUTTERFLY_4(reg12, reg14, reg13, reg3, reg8, reg6, reg7, reg5); in vp9_idct16_1d_columns_addblk_msa()
1057 SRARI_H4_SH(reg8, reg10, reg12, reg14, 6); in vp9_idct16_1d_columns_addblk_msa()
1058 VP9_ADDBLK_ST8x4_UB(dst, dst_stride, reg8, reg1 in vp9_idct16_1d_columns_addblk_msa()
1070 v8i16 reg0, reg2, reg4, reg6, reg8, reg10, reg12, reg14; vp9_idct16_1d_columns_msa() local
[all...] |
| /third_party/ffmpeg/libavcodec/aarch64/ |
| H A D | vp9mc_16bpp_neon.S | 355 .macro do_store8 reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8, minreg, type
363 sqrshrun2 \reg4\().8h, \reg8\().4s, #7
368 ld1 {\reg8\().8h}, [x7], x1
378 urhadd \reg4\().8h, \reg4\().8h, \reg8\().8h
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| /third_party/backends/backend/ |
| H A D | plustek-usbscan.c | 1152 static u_char reg8, reg38[6], reg48[2]; in usb_SetScanParameters() local
1263 regs[0x08] = reg8; in usb_SetScanParameters()
1269 reg8 = regs[0x08]; in usb_SetScanParameters()
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| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | register-arm64.h | 517 const CPURegister& reg7 = NoReg, const CPURegister& reg8 = NoReg);
527 const CPURegister& reg7 = NoCPUReg, const CPURegister& reg8 = NoCPUReg);
|
| H A D | assembler-arm64.cc | 227 const CPURegister& reg7, const CPURegister& reg8) { in AreAliased()
234 const CPURegister regs[] = {reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8}; in AreAliased()
263 const CPURegister& reg7, const CPURegister& reg8) { in AreSameSizeAndType()
272 match &= !reg8.is_valid() || reg8.IsSameSizeAndType(reg1); in AreSameSizeAndType()
224 AreAliased(const CPURegister& reg1, const CPURegister& reg2, const CPURegister& reg3, const CPURegister& reg4, const CPURegister& reg5, const CPURegister& reg6, const CPURegister& reg7, const CPURegister& reg8) AreAliased() argument
260 AreSameSizeAndType(const CPURegister& reg1, const CPURegister& reg2, const CPURegister& reg3, const CPURegister& reg4, const CPURegister& reg5, const CPURegister& reg6, const CPURegister& reg7, const CPURegister& reg8) AreSameSizeAndType() argument
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