| /third_party/ffmpeg/libavcodec/loongarch/ |
| H A D | vp9_idct_lsx.c | 376 __m128i reg0, reg2, reg4, reg6, reg8, reg10, reg12, reg14; in vp9_idct16_1d_columns_addblk_lsx() local
385 reg4, reg5, reg6, reg7); in vp9_idct16_1d_columns_addblk_lsx()
409 VP9_DOTP_CONST_PAIR(reg10, reg6, cospi_12_64, cospi_20_64, reg10, reg6); in vp9_idct16_1d_columns_addblk_lsx()
410 LSX_BUTTERFLY_4_H(reg2, reg14, reg6, reg10, loc0, loc1, reg14, reg2); in vp9_idct16_1d_columns_addblk_lsx()
414 LSX_BUTTERFLY_4_H(reg8, reg0, reg4, reg12, reg2, reg6, reg10, reg14); in vp9_idct16_1d_columns_addblk_lsx()
420 reg4 = __lsx_vsub_h(reg6, loc3); in vp9_idct16_1d_columns_addblk_lsx()
421 reg6 = __lsx_vadd_h(reg6, loc3); in vp9_idct16_1d_columns_addblk_lsx()
457 reg2 = __lsx_vadd_h(reg6, loc in vp9_idct16_1d_columns_addblk_lsx()
502 __m128i reg0, reg2, reg4, reg6, reg8, reg10, reg12, reg14; vp9_idct16_1d_columns_lsx() local
883 __m128i reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; vp9_idct8x32_column_even_process_store() local
957 reg6, reg1); vp9_idct8x32_column_even_process_store() local
998 __m128i reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; vp9_idct8x32_column_odd_process_store() local
[all...] |
| H A D | vp9_mc_lsx.c | 590 __m128i reg6, reg7, reg8, reg9, reg10, reg11; in common_vt_8t_16w_lsx() local
614 reg6, reg7, reg8, reg9); in common_vt_8t_16w_lsx()
632 tmp2 = FILT_8TAP_DPADD_S_H(reg6, reg7, reg8, src4, filter0, filter1, in common_vt_8t_16w_lsx()
663 reg6 = reg8; in common_vt_8t_16w_lsx()
684 __m128i reg6, reg7, reg8, reg9, reg10, reg11; in common_vt_8t_16w_mult_lsx() local
720 reg6, reg7, reg8, reg9); in common_vt_8t_16w_mult_lsx()
739 tmp2 = FILT_8TAP_DPADD_S_H(reg6, reg7, reg8, src4, filter0, in common_vt_8t_16w_mult_lsx()
769 reg6 = reg8; in common_vt_8t_16w_mult_lsx()
1706 __m128i reg6, reg7, reg8, reg9, reg10, reg11; in common_vt_8t_and_aver_dst_16w_mult_lsx() local
1740 reg6, reg in common_vt_8t_and_aver_dst_16w_mult_lsx()
[all...] |
| /third_party/ffmpeg/libavcodec/mips/ |
| H A D | vp9_idct_msa.c | 967 v8i16 reg0, reg2, reg4, reg6, reg8, reg10, reg12, reg14; in vp9_idct16_1d_columns_addblk_msa() local
974 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7, in vp9_idct16_1d_columns_addblk_msa()
982 VP9_DOTP_CONST_PAIR(reg10, reg6, cospi_12_64, cospi_20_64, reg10, reg6); in vp9_idct16_1d_columns_addblk_msa()
983 BUTTERFLY_4(reg2, reg14, reg6, reg10, loc0, loc1, reg14, reg2); in vp9_idct16_1d_columns_addblk_msa()
987 BUTTERFLY_4(reg8, reg0, reg4, reg12, reg2, reg6, reg10, reg14); in vp9_idct16_1d_columns_addblk_msa()
993 reg4 = reg6 - loc3; in vp9_idct16_1d_columns_addblk_msa()
994 reg6 = reg6 + loc3; in vp9_idct16_1d_columns_addblk_msa()
1030 reg2 = reg6 in vp9_idct16_1d_columns_addblk_msa()
1070 v8i16 reg0, reg2, reg4, reg6, reg8, reg10, reg12, reg14; vp9_idct16_1d_columns_msa() local
1634 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; vp9_idct8x32_column_even_process_store() local
1718 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; vp9_idct8x32_column_odd_process_store() local
[all...] |
| /third_party/vixl/src/aarch64/ |
| H A D | registers-aarch64.h | 978 const CPURegister& reg6 = NoReg,
989 const CPURegister regs[] = {reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8};
1034 const CPURegister& reg6 = NoCPUReg,
1043 match &= !reg6.IsValid() || reg6.IsSameSizeAndType(reg1);
1058 const CPURegister& reg6 = NoReg,
1067 even &= !reg6.IsValid() || ((reg6.GetCode() % 2) == 0);
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| /third_party/ffmpeg/libavcodec/aarch64/ |
| H A D | vp9mc_16bpp_neon.S | 355 .macro do_store8 reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8, minreg, type
361 sqrshrun2 \reg3\().8h, \reg6\().4s, #7
366 ld1 {\reg6\().8h}, [x7], x1
376 urhadd \reg2\().8h, \reg2\().8h, \reg6\().8h
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| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | register-arm64.h | 516 const CPURegister& reg5 = NoReg, const CPURegister& reg6 = NoReg,
526 const CPURegister& reg5 = NoCPUReg, const CPURegister& reg6 = NoCPUReg,
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| H A D | assembler-arm64.cc | 226 const CPURegister& reg5, const CPURegister& reg6, in AreAliased()
234 const CPURegister regs[] = {reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8}; in AreAliased()
262 const CPURegister& reg5, const CPURegister& reg6, in AreSameSizeAndType()
270 match &= !reg6.is_valid() || reg6.IsSameSizeAndType(reg1); in AreSameSizeAndType()
224 AreAliased(const CPURegister& reg1, const CPURegister& reg2, const CPURegister& reg3, const CPURegister& reg4, const CPURegister& reg5, const CPURegister& reg6, const CPURegister& reg7, const CPURegister& reg8) AreAliased() argument
260 AreSameSizeAndType(const CPURegister& reg1, const CPURegister& reg2, const CPURegister& reg3, const CPURegister& reg4, const CPURegister& reg5, const CPURegister& reg6, const CPURegister& reg7, const CPURegister& reg8) AreSameSizeAndType() argument
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| /third_party/node/deps/v8/src/codegen/arm/ |
| H A D | macro-assembler-arm.h | 38 Register reg6 = no_reg);
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| H A D | macro-assembler-arm.cc | 2617 Register reg6) { in CallRecordWriteStub()
2618 RegList regs = {reg1, reg2, reg3, reg4, reg5, reg6}; in CallRecordWriteStub()
2615 GetRegisterThatIsNotOneOf(Register reg1, Register reg2, Register reg3, Register reg4, Register reg5, Register reg6) CallRecordWriteStub() argument
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| /third_party/node/deps/v8/src/codegen/loong64/ |
| H A D | macro-assembler-loong64.h | 50 Register reg6 = no_reg);
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| H A D | macro-assembler-loong64.cc | 4063 Register reg6) { in CallRecordWriteStub()
4064 RegList regs = {reg1, reg2, reg3, reg4, reg5, reg6}; in CallRecordWriteStub()
4061 GetRegisterThatIsNotOneOf(Register reg1, Register reg2, Register reg3, Register reg4, Register reg5, Register reg6) CallRecordWriteStub() argument
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| /third_party/node/deps/v8/src/codegen/mips64/ |
| H A D | macro-assembler-mips64.h | 65 Register reg6 = no_reg);
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| H A D | macro-assembler-mips64.cc | 6075 Register reg6) { in CallRecordWriteStub()
6076 RegList regs = {reg1, reg2, reg3, reg4, reg5, reg6}; in CallRecordWriteStub()
6073 GetRegisterThatIsNotOneOf(Register reg1, Register reg2, Register reg3, Register reg4, Register reg5, Register reg6) CallRecordWriteStub() argument
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| /third_party/node/deps/v8/src/codegen/mips/ |
| H A D | macro-assembler-mips.h | 55 Register reg6 = no_reg);
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| H A D | macro-assembler-mips.cc | 5532 Register reg6) { in CallRecordWriteStub()
5533 RegList regs = {reg1, reg2, reg3, reg4, reg5, reg6}; in CallRecordWriteStub()
5530 GetRegisterThatIsNotOneOf(Register reg1, Register reg2, Register reg3, Register reg4, Register reg5, Register reg6) CallRecordWriteStub() argument
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| /third_party/node/deps/v8/src/codegen/riscv64/ |
| H A D | macro-assembler-riscv64.h | 64 Register reg6 = no_reg);
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| H A D | macro-assembler-riscv64.cc | 4954 Register reg6) { in GetRegisterThatIsNotOneOf()
4955 RegList regs = {reg1, reg2, reg3, reg4, reg5, reg6}; in GetRegisterThatIsNotOneOf()
4952 GetRegisterThatIsNotOneOf(Register reg1, Register reg2, Register reg3, Register reg4, Register reg5, Register reg6) GetRegisterThatIsNotOneOf() argument
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| /third_party/node/deps/v8/src/codegen/ppc/ |
| H A D | macro-assembler-ppc.h | 37 Register reg6 = no_reg);
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| H A D | macro-assembler-ppc.cc | 3387 Register reg6) { in CallRecordWriteStub()
3388 RegList regs = {reg1, reg2, reg3, reg4, reg5, reg6}; in CallRecordWriteStub()
3385 GetRegisterThatIsNotOneOf(Register reg1, Register reg2, Register reg3, Register reg4, Register reg5, Register reg6) CallRecordWriteStub() argument
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| /third_party/node/deps/v8/src/codegen/s390/ |
| H A D | macro-assembler-s390.h | 41 Register reg6 = no_reg);
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| H A D | macro-assembler-s390.cc | 2423 Register reg6) { in CallRecordWriteStub()
2424 RegList regs = {reg1, reg2, reg3, reg4, reg5, reg6}; in CallRecordWriteStub()
2421 GetRegisterThatIsNotOneOf(Register reg1, Register reg2, Register reg3, Register reg4, Register reg5, Register reg6) CallRecordWriteStub() argument
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