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Searched refs:rb_mask (Results 1 - 5 of 5) sorted by relevance

/third_party/mesa3d/src/amd/common/
H A Dac_gpu_info.c1755 unsigned rb_mask = info->enabled_rb_mask; in ac_get_harvested_configs() local
1762 se_mask[0] = ((1 << rb_per_se) - 1) & rb_mask; in ac_get_harvested_configs()
1763 se_mask[1] = (se_mask[0] << rb_per_se) & rb_mask; in ac_get_harvested_configs()
1764 se_mask[2] = (se_mask[1] << rb_per_se) & rb_mask; in ac_get_harvested_configs()
1765 se_mask[3] = (se_mask[2] << rb_per_se) & rb_mask; in ac_get_harvested_configs()
1801 pkr0_mask &= rb_mask; in ac_get_harvested_configs()
1802 pkr1_mask &= rb_mask; in ac_get_harvested_configs()
1817 rb0_mask &= rb_mask; in ac_get_harvested_configs()
1818 rb1_mask &= rb_mask; in ac_get_harvested_configs()
1832 rb0_mask &= rb_mask; in ac_get_harvested_configs()
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/third_party/mesa3d/src/amd/vulkan/
H A Dsi_cmd_buffer.c179 unsigned rb_mask = physical_device->rad_info.enabled_rb_mask; in si_set_raster_config() local
187 if (!rb_mask || util_bitcount(rb_mask) >= num_rb) { in si_set_raster_config()
H A Dradv_query.c1775 uint64_t rb_mask = in emit_begin_query() local
1782 PIXEL_PIPE_STATE_CNTL_INSTANCE_EN_LO(rb_mask)); in emit_begin_query()
1783 radeon_emit(cs, PIXEL_PIPE_STATE_CNTL_INSTANCE_EN_HI(rb_mask)); in emit_begin_query()
/third_party/mesa3d/src/gallium/drivers/radeonsi/
H A Dsi_query.c817 uint64_t rb_mask = BITFIELD64_MASK(sctx->screen->info.max_render_backends); in si_query_hw_do_emit_start() local
823 PIXEL_PIPE_STATE_CNTL_INSTANCE_EN_LO(rb_mask)); in si_query_hw_do_emit_start()
824 radeon_emit(PIXEL_PIPE_STATE_CNTL_INSTANCE_EN_HI(rb_mask)); in si_query_hw_do_emit_start()
H A Dsi_state.c5524 unsigned rb_mask = sscreen->info.enabled_rb_mask; in si_set_raster_config() local
5528 if (!rb_mask || util_bitcount(rb_mask) >= num_rb) { in si_set_raster_config()

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