| /third_party/mesa3d/src/amd/common/ |
| H A D | ac_surface_meta_address_test.c | 60 * bpp, number of fragments, pipe_aligned, rb_aligned */ in gfx9_meta_addr_from_coord()
198 unsigned swizzle_mode, bool pipe_aligned, bool rb_aligned, in one_dcc_address_test()
215 in.dccKeyFlags.rbAligned = din.dccKeyFlags.rbAligned = rb_aligned; in one_dcc_address_test()
240 xin.flags.metaRbUnaligned = !rb_aligned; in one_dcc_address_test()
370 for (int rb_aligned = true; rb_aligned >= (samples > 1 ? true : false); rb_aligned--) { in run_dcc_address_test()
377 width, height, depth, bpp, samples, rb_aligned, pipe_aligned); in run_dcc_address_test()
381 rb_aligned, mrt_index, 0, 0, 0, 0)) { in run_dcc_address_test()
580 bool pipe_aligned, bool rb_aligned, unsigne in one_cmask_address_test()
195 one_dcc_address_test(const char *name, const char *test, ADDR_HANDLE addrlib, const struct radeon_info *info, unsigned width, unsigned height, unsigned depth, unsigned samples, unsigned bpp, unsigned swizzle_mode, bool pipe_aligned, bool rb_aligned, unsigned mrt_index, unsigned start_x, unsigned start_y, unsigned start_z, unsigned start_sample) one_dcc_address_test() argument
576 one_cmask_address_test(const char *name, const char *test, ADDR_HANDLE addrlib, const struct radeon_info *info, unsigned width, unsigned height, unsigned depth, unsigned bpp, unsigned swizzle_mode, bool pipe_aligned, bool rb_aligned, unsigned mrt_index, unsigned start_x, unsigned start_y, unsigned start_z) one_cmask_address_test() argument
[all...] |
| H A D | ac_surface_modifier_test.c | 71 bool rb_aligned, bool pipe_aligned) in get_addr_from_coord_base()
87 din.dccKeyFlags.rbAligned = surf->u.gfx9.color.dcc.rb_aligned; in get_addr_from_coord_base()
102 dcc_input.dccKeyFlags.rbAligned = rb_aligned; in get_addr_from_coord_base()
148 surf->u.gfx9.color.dcc.rb_aligned, in generate_hash()
69 get_addr_from_coord_base(ADDR_HANDLE addrlib, const struct radeon_surf *surf, unsigned w, unsigned h, enum pipe_format format, bool rb_aligned, bool pipe_aligned) get_addr_from_coord_base() argument
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| H A D | ac_surface.c | 1592 const struct radeon_surf *surf, bool rb_aligned, in is_dcc_supported_by_DCN()
1603 if (info->use_display_dcc_unaligned && (rb_aligned || pipe_aligned)) in is_dcc_supported_by_DCN()
1926 surf->u.gfx9.color.dcc.rb_aligned = din.dccKeyFlags.rbAligned; in gfx9_compute_miptree()
2001 assert(surf->u.gfx9.color.dcc.pipe_aligned || surf->u.gfx9.color.dcc.rb_aligned); in gfx9_compute_miptree()
2380 (!is_dcc_supported_by_DCN(info, config, surf, surf->u.gfx9.color.dcc.rb_aligned, in gfx9_compute_surface()
2397 assert(is_dcc_supported_by_DCN(info, config, surf, surf->u.gfx9.color.dcc.rb_aligned, in gfx9_compute_surface()
2408 is_dcc_supported_by_DCN(info, config, surf, surf->u.gfx9.color.dcc.rb_aligned, in gfx9_compute_surface()
2775 surf->u.gfx9.color.dcc.rb_aligned = G_008F24_META_RB_ALIGNED(desc[5]); in ac_surface_set_umd_metadata()
2778 if (!surf->u.gfx9.color.dcc.pipe_aligned && !surf->u.gfx9.color.dcc.rb_aligned) in ac_surface_set_umd_metadata()
1590 is_dcc_supported_by_DCN(const struct radeon_info *info, const struct ac_surf_config *config, const struct radeon_surf *surf, bool rb_aligned, bool pipe_aligned) is_dcc_supported_by_DCN() argument
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| H A D | ac_surface.h | 159 uint8_t rb_aligned : 1; /* optimal for RBs */ member
203 * - rb_aligned
271 /* Displayable DCC. This is always rb_aligned=0 and pipe_aligned=0.
273 * All other chips must set rb_aligned=1.
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| /third_party/mesa3d/src/amd/vulkan/ |
| H A D | radv_image.c | 828 .rb_aligned = 1, in si_set_mutable_tex_desc_fields()
859 .rb_aligned = 1, in si_set_mutable_tex_desc_fields()
868 S_008F24_META_RB_ALIGNED(meta.rb_aligned); in si_set_mutable_tex_desc_fields()
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| H A D | radv_device.c | 6276 .rb_aligned = 1, in radv_initialise_color_surface()
6285 S_028C74_RB_ALIGNED(meta.rb_aligned) | in radv_initialise_color_surface()
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| /third_party/mesa3d/src/gallium/drivers/radeonsi/ |
| H A D | si_descriptors.c | 354 .rb_aligned = 1, in si_set_mutable_tex_desc_fields()
404 .rb_aligned = 1, in si_set_mutable_tex_desc_fields()
413 S_008F24_META_RB_ALIGNED(meta.rb_aligned); in si_set_mutable_tex_desc_fields()
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| H A D | si_state.c | 3357 .rb_aligned = 1, in si_emit_framebuffer_state()
3373 S_028C74_RB_ALIGNED(meta.rb_aligned) | in si_emit_framebuffer_state()
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