Searched refs:radeon_set_config_reg_seq (Results 1 - 7 of 7) sorted by relevance
| /third_party/mesa3d/src/gallium/drivers/r600/ |
| H A D | r600_cs.h | 128 static inline void radeon_set_config_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num) in radeon_set_config_reg_seq() function
138 radeon_set_config_reg_seq(cs, reg, 1); in radeon_set_config_reg()
|
| H A D | evergreen_compute.c | 636 radeon_set_config_reg_seq(cs, R_00899C_VGT_COMPUTE_START_X, 3); in evergreen_emit_dispatch()
802 radeon_set_config_reg_seq(cs, R_008C04_SQ_GPR_RESOURCE_MGMT_1, 3); in compute_emit_cs()
|
| H A D | r600_state.c | 1307 radeon_set_config_reg_seq(cs, R_008B48_PA_SC_AA_SAMPLE_LOCS_8S_WD0, 2); in r600_emit_msaa_state()
1863 radeon_set_config_reg_seq(cs, offset, 4); in r600_emit_sampler_states()
|
| H A D | evergreen_state.c | 986 radeon_set_config_reg_seq(cs, R_008C04_SQ_GPR_RESOURCE_MGMT_1, 3); in evergreen_emit_config_state()
2472 radeon_set_config_reg_seq(cs, border_index_reg, 5); in evergreen_emit_sampler_states()
|
| /third_party/mesa3d/src/amd/vulkan/ |
| H A D | radv_cs.h | 43 radeon_set_config_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num) in radeon_set_config_reg_seq() function
55 radeon_set_config_reg_seq(cs, reg, 1); in radeon_set_config_reg()
|
| H A D | radv_device.c | 4103 radeon_set_config_reg_seq(cs, R_0088C8_VGT_ESGS_RING_SIZE, 2); in radv_emit_gs_ring_sizes()
|
| /third_party/mesa3d/src/gallium/drivers/radeonsi/ |
| H A D | si_build_pm4.h | 76 #define radeon_set_config_reg_seq(reg, num) do { \ macro
84 radeon_set_config_reg_seq(reg, 1); \
|
Completed in 29 milliseconds