Searched refs:ra_alloc_reg_set (Results 1 - 11 of 11) sorted by relevance
| /third_party/mesa3d/src/util/tests/ |
| H A D | register_allocate_test.cpp | 90 struct ra_regs *regs = ra_alloc_reg_set(mem_ctx, 100, true); in TEST_F()
130 struct ra_regs *regs = ra_alloc_reg_set(mem_ctx, 16, true); in TEST_F()
154 struct ra_regs *regs = ra_alloc_reg_set(mem_ctx, 16, true); in TEST_F()
175 struct ra_regs *regs = ra_alloc_reg_set(mem_ctx, base_regs, true); in TEST_F()
226 regs = ra_alloc_reg_set(mem_ctx, 4 + 4 + 4, true);
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| /third_party/mesa3d/src/util/ |
| H A D | register_allocate.h | 53 struct ra_regs *ra_alloc_reg_set(void *mem_ctx, unsigned int count,
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| H A D | register_allocate.c | 91 ra_alloc_reg_set(void *mem_ctx, unsigned int count, bool need_conflict_lists) in ra_alloc_reg_set() function
433 struct ra_regs *regs = ra_alloc_reg_set(mem_ctx, reg_count, false); in ra_set_deserialize()
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| /third_party/mesa3d/src/gallium/drivers/etnaviv/ |
| H A D | etnaviv_compiler_nir_ra.c | 87 struct ra_regs *regs = ra_alloc_reg_set(mem_ctx, ETNA_MAX_TEMPS * in etna_ra_setup()
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| /third_party/mesa3d/src/imagination/rogue/ |
| H A D | rogue_regalloc.c | 91 ra->regs = ra_alloc_reg_set(ra, total_regs, true); in rogue_ra_init()
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| /third_party/mesa3d/src/gallium/drivers/vc4/ |
| H A D | vc4_register_allocate.c | 118 vc4->regs = ra_alloc_reg_set(vc4, ARRAY_SIZE(vc4_regs), false); in vc4_alloc_reg_set()
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| /third_party/mesa3d/src/intel/compiler/ |
| H A D | brw_vec4_reg_allocate.cpp | 111 compiler->vec4_reg_set.regs = ra_alloc_reg_set(compiler, base_reg_count, false); in brw_vec4_alloc_reg_set()
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| H A D | brw_fs_reg_allocate.cpp | 121 struct ra_regs *regs = ra_alloc_reg_set(compiler, BRW_MAX_GRF, false); in brw_alloc_reg_set()
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| /third_party/mesa3d/src/gallium/drivers/lima/ir/pp/ |
| H A D | regalloc.c | 54 struct ra_regs *ret = ra_alloc_reg_set(mem_ctx, PPIR_REG_COUNT, false); in ppir_regalloc_init()
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| /third_party/mesa3d/src/gallium/drivers/r300/compiler/ |
| H A D | radeon_pair_regalloc.c | 696 s->regs = ra_alloc_reg_set(NULL, R500_PFS_NUM_TEMP_REGS * RC_MASK_XYZW, in rc_init_regalloc_state()
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| /third_party/mesa3d/src/broadcom/compiler/ |
| H A D | vir_register_allocate.c | 898 compiler->regs = ra_alloc_reg_set(compiler, PHYS_INDEX + PHYS_COUNT, in vir_init_reg_sets()
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