Home
last modified time | relevance | path

Searched refs:r600 (Results 1 - 25 of 91) sorted by relevance

1234

/third_party/mesa3d/src/gallium/drivers/r600/sfn/
H A Dsfn_nir.cpp49 namespace r600 { namespace
358 bool result = r600::LowerClipvertexWrite(noutputs, so_info).run(sh); in r600_lower_clipvertex_to_clipdist()
388 using r600::r600_lower_scratch_addresses;
389 using r600::r600_lower_fs_out_to_vector;
390 using r600::r600_lower_ubo_to_align16;
635 r600::release_pool(); in ~MallocPoolRelease()
658 r600::sort_uniforms(sel->nir); in r600_shader_from_nir()
721 NIR_PASS_V(sel->nir, r600::r600_nir_split_64bit_io); in r600_shader_from_nir()
753 NIR_PASS_V(sh, r600::r600_nir_split_64bit_io); in r600_shader_from_nir()
754 NIR_PASS_V(sh, r600 in r600_shader_from_nir()
[all...]
H A Dsfn_nir_lower_alu.cpp30 namespace r600 { namespace
124 } // namespace r600
129 return r600::Lower2x16().run(shader); in r600_nir_lower_pack_unpack_2x16()
134 return r600::LowerSinCos(gfx_level).run(shader); in r600_nir_lower_trigen()
H A Dsfn_nir_lower_fs_out_to_vector.h32 namespace r600 { namespace
H A Dsfn_peephole.h32 namespace r600 { namespace
H A Dsfn_scheduler.h32 namespace r600 { namespace
H A Dsfn_liverangeevaluator.h35 namespace r600 { namespace
H A Dsfn_callstack.h30 #include "gallium/drivers/r600/r600_asm.h"
32 namespace r600 { namespace
H A Dsfn_optimizer.h32 namespace r600 { namespace
H A Dsfn_assembler.h35 namespace r600 { namespace
H A Dsfn_conditionaljumptracker.h30 #include "gallium/drivers/r600/r600_asm.h"
32 namespace r600 { namespace
H A Dsfn_instr_tex.cpp32 namespace r600 { namespace
538 r600::sfn_log << SfnLog::instr << "emit '" in emit_tex_tex_ms_direct()
576 r600::sfn_log << SfnLog::instr << "emit '" in emit_tex_tex_ms()
680 r600::sfn_log << SfnLog::instr << "emit '" in emit_tex_txd()
818 r600::sfn_log << SfnLog::instr << "emit '" in emit_tex_tg4()
826 r600::sfn_log << SfnLog::instr << "emit '" in emit_tex_tg4()
845 r600::sfn_log << SfnLog::tex << " really have offsets and they are " << in emit_tex_tg4()
882 r600::sfn_log << SfnLog::tex << "emit literal offsets\n"; in emit_tex_tg4()
H A Dsfn_instrfactory.h36 namespace r600 { namespace
H A Dsfn_ra.h34 namespace r600 { namespace
H A Dsfn_alu_readport_validation.h32 namespace r600 { namespace
H A Dsfn_shader_cs.h32 namespace r600 { namespace
H A Dsfn_memorypool.h36 namespace r600 { namespace
H A Dsfn_callstack.cpp29 namespace r600 { namespace
H A Dsfn_shader_gs.h8 namespace r600 { namespace
H A Dsfn_memorypool.cpp39 namespace r600 { namespace
/third_party/mesa3d/src/gallium/drivers/r600/sfn/tests/
H A Dsfn_optimizer_test.cpp8 using namespace r600;
121 auto lrm = r600::LiveRangeEvaluator().run(*sh); in TEST_F()
122 EXPECT_TRUE(r600::register_allocation(lrm)); in TEST_F()
132 auto lrm = r600::LiveRangeEvaluator().run(*sh); in TEST_F()
133 EXPECT_TRUE(r600::register_allocation(lrm)); in TEST_F()
H A Dsfn_test_shaders.h5 namespace r600 { namespace
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DAMDGPUMCTargetDesc.cpp61 if (TT.getArch() == Triple::r600) in createAMDGPUMCRegisterInfo()
70 if (TT.getArch() == Triple::r600) in createAMDGPUMCSubtargetInfo()
80 if (T.getArch() == Triple::r600) in createAMDGPUMCInstPrinter()
H A DAMDGPUMCAsmInfo.cpp56 if (!STI || STI->getTargetTriple().getArch() == Triple::r600) in getMaxInstLength()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/TargetInfo/
H A DAMDGPUTargetInfo.cpp32 RegisterTarget<Triple::r600, false> R600(getTheAMDGPUTarget(), "r600", in LLVMInitializeAMDGPUTargetInfo()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Support/
H A DTriple.cpp52 case r600: return "r600"; in getArchTypeName()
109 case r600: return "r600"; in getArchTypePrefix()
286 .Case("r600", r600) in getArchTypeForLLVMName()
419 .Case("r600", Triple::r600) in parseArch()
692 case Triple::r600: in getDefaultFormat()
1256 case llvm::Triple::r600
[all...]

Completed in 9 milliseconds

1234