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Searched refs:physreg (Results 1 - 5 of 5) sorted by relevance

/third_party/mesa3d/src/freedreno/ir3/
H A Dir3_ra.c323 /* Map of defining ir3_register -> physreg it was allocated to at the end
334 * is a map from ir3_register -> physreg.
621 mesa_log_stream_printf(stream, "physreg %u ", interval->physreg_start); in ra_interval_dump()
794 struct ir3_register *reg, physreg_t physreg, bool is_source) in get_reg_specified()
799 physreg + i)) in get_reg_specified()
804 check_dst_overlap(ctx, file, reg, physreg, physreg + reg_size(reg))) in get_reg_specified()
810 /* Try to evict any registers conflicting with the proposed spot "physreg" for
811 * "reg". That is, move them to other places so that we can allocate "physreg"
817 struct ir3_register *reg, physreg_t physreg, in try_evict_regs()
793 get_reg_specified(struct ra_ctx *ctx, struct ra_file *file, struct ir3_register *reg, physreg_t physreg, bool is_source) get_reg_specified() argument
816 try_evict_regs(struct ra_ctx *ctx, struct ra_file *file, struct ir3_register *reg, physreg_t physreg, unsigned *_eviction_count, bool is_source, bool speculative) try_evict_regs() argument
1222 physreg_t physreg; compress_regs_left() local
1300 update_affinity(struct ra_file *file, struct ir3_register *reg, physreg_t physreg) update_affinity() argument
1495 allocate_dst_fixed(struct ra_ctx *ctx, struct ir3_register *dst, physreg_t physreg) allocate_dst_fixed() argument
1557 physreg_t physreg = get_reg(ctx, file, dst); allocate_dst() local
1570 physreg_t physreg; assign_src() local
1671 physreg_t physreg = ra_interval_get_physreg(src_interval); handle_split() local
1802 physreg_t physreg = ra_reg_get_physreg(instr->dsts[0]); handle_precolored_input() local
1865 physreg_t physreg = ra_reg_get_physreg(src); handle_precolored_source() local
1927 physreg_t physreg = ~0; handle_live_in() local
1961 physreg_t physreg = ra_interval_get_physreg(interval); handle_live_out() local
1981 physreg_t physreg; handle_phi() local
2082 physreg_t physreg = ra_interval_get_physreg(interval); insert_live_in_move() local
2414 unsigned physreg = ra_reg_get_physreg(dst) + reg_size(dst); calc_min_limit_pressure() local
[all...]
H A Dir3_ra.h56 ra_physreg_to_num(physreg_t physreg, unsigned flags) in ra_physreg_to_num() argument
59 physreg /= 2; in ra_physreg_to_num()
61 physreg += 48 * 4; in ra_physreg_to_num()
62 return physreg; in ra_physreg_to_num()
215 * need to keep track of the physreg of each top-level interval. These
H A Dir3_ra_validate.c69 * sources to their destinations. This means that each physreg must carry the
223 physreg_t physreg = ra_reg_get_physreg(dst); in propagate_normal_instr() local
225 file->regs[physreg + i] = (struct reg_state){ in propagate_normal_instr()
443 physreg_t physreg = ra_reg_get_physreg(src); in check_reaching_src() local
451 struct reg_state actual = file->regs[physreg + i]; in check_reaching_src()
H A Dir3_spill.c574 physreg_t physreg = ra_reg_get_physreg(dst); in insert_dst() local
575 physreg_t max = physreg + reg_size(dst); in insert_dst()
/third_party/mesa3d/src/gallium/drivers/lima/ir/gp/
H A Dscheduler.c80 * directly for normal registers -- the physreg assigned to a value register
1029 int physreg = ffsll(available) - 1; in try_spill_node() local
1031 ctx->live_physregs |= (1ull << physreg); in try_spill_node()
1034 store->index = physreg / 4; in try_spill_node()
1035 store->component = physreg % 4; in try_spill_node()
1052 &ctx->physreg_reads[physreg], reg_link) { in try_spill_node()

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