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Searched refs:pTileInfo (Results 1 - 10 of 10) sorted by relevance

/third_party/mesa3d/src/amd/addrlib/src/r800/
H A Degbaddrlib.cpp100 ADDR_TILEINFO* pTileInfo = &tileInfoDef; in DispatchComputeSurfaceInfo() local
122 // Caller makes sure pOut->pTileInfo is not NULL, see HwlComputeSurfaceInfo in DispatchComputeSurfaceInfo()
123 ADDR_ASSERT(pOut->pTileInfo); in DispatchComputeSurfaceInfo()
125 if (pOut->pTileInfo != NULL) in DispatchComputeSurfaceInfo()
127 pTileInfo = pOut->pTileInfo; in DispatchComputeSurfaceInfo()
131 if (pIn->pTileInfo != NULL) in DispatchComputeSurfaceInfo()
133 if (pTileInfo != pIn->pTileInfo) in DispatchComputeSurfaceInfo()
135 *pTileInfo in DispatchComputeSurfaceInfo()
878 ADDR_TILEINFO* pTileInfo = pOut->pTileInfo; ComputeSurfaceAlignmentsMacroTiled() local
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H A Degbaddrlib.h110 UINT_32 bankSwizzle, UINT_32 pipeSwizzle, ADDR_TILEINFO* pTileInfo,
125 BOOL_32 isTcCompatible, BOOL_32 isLinear, ADDR_TILEINFO* pTileInfo) const;
185 ADDR_TILEINFO* pTileInfo) const = 0;
194 UINT_32 tileX, UINT_32 bank, ADDR_TILEINFO* pTileInfo) const = 0;
201 ADDR_TILEINFO* pTileInfo) const = 0;
230 virtual UINT_32 HwlStereoCheckRightOffsetPadding(ADDR_TILEINFO* pTileInfo) const;
235 ADDR_TILEINFO* pTileInfo) const;
244 ADDR_TILEINFO* pTileInfo) const;
248 UINT_32 base256b, ADDR_TILEINFO* pTileInfo,
253 UINT_64 baseAddr, ADDR_TILEINFO* pTileInfo) cons
260 ComputeBankEquation( UINT_32 log2BytesPP, UINT_32 threshX, UINT_32 threshY, ADDR_TILEINFO* pTileInfo, ADDR_EQUATION* pEquation) const ComputeBankEquation() argument
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H A Dsiaddrlib.cpp140 const ADDR_TILEINFO* pTileInfo ///< [in] Tile info in HwlGetPipes()
145 if (pTileInfo) in HwlGetPipes()
147 numPipes = GetPipePerSurf(pTileInfo->pipeConfig); in HwlGetPipes()
219 ADDR_TILEINFO* pTileInfo, ///< [in] tile info in ComputeBankEquation()
225 UINT_32 pipes = HwlGetPipes(pTileInfo); in ComputeBankEquation()
226 UINT_32 bankXStart = 3 + Log2(pipes) + Log2(pTileInfo->bankWidth); in ComputeBankEquation()
227 UINT_32 bankYStart = 3 + Log2(pTileInfo->bankHeight); in ComputeBankEquation()
247 switch (pTileInfo->banks) in ComputeBankEquation()
250 if (pTileInfo->macroAspectRatio == 1) in ComputeBankEquation()
262 else if (pTileInfo in ComputeBankEquation()
215 ComputeBankEquation( UINT_32 log2BytesPP, UINT_32 threshX, UINT_32 threshY, ADDR_TILEINFO* pTileInfo, ADDR_EQUATION* pEquation ) const ComputeBankEquation() argument
444 ComputePipeEquation( UINT_32 log2BytesPP, UINT_32 threshX, UINT_32 threshY, ADDR_TILEINFO* pTileInfo, ADDR_EQUATION* pEquation ) const ComputePipeEquation() argument
1288 HwlComputeXmaskAddrFromCoord( UINT_32 pitch, UINT_32 height, UINT_32 x, UINT_32 y, UINT_32 slice, UINT_32 numSlices, UINT_32 factor, BOOL_32 isLinear, BOOL_32 isWidth8, BOOL_32 isHeight8, ADDR_TILEINFO* pTileInfo, UINT_32* pBitPosition ) const HwlComputeXmaskAddrFromCoord() argument
1447 HwlComputeXmaskCoordFromAddr( UINT_64 addr, UINT_32 bitPosition, UINT_32 pitch, UINT_32 height, UINT_32 numSlices, UINT_32 factor, BOOL_32 isLinear, BOOL_32 isWidth8, BOOL_32 isHeight8, ADDR_TILEINFO* pTileInfo, UINT_32* pX, UINT_32* pY, UINT_32* pSlice ) const HwlComputeXmaskCoordFromAddr() argument
1960 ADDR_TILEINFO* pTileInfo = pTileInfoOut; HwlSetupTileInfo() local
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H A Dciaddrlib.cpp298 UINT_32 numOfPipes = HwlGetPipes(pIn->pTileInfo); in HwlComputeCmaskAddrFromCoord()
299 UINT_32 numOfBanks = pIn->pTileInfo->banks; in HwlComputeCmaskAddrFromCoord()
342 UINT_32 numOfPipes = HwlGetPipes(pIn->pTileInfo); in HwlComputeHtileAddrFromCoord()
343 UINT_32 numOfBanks = pIn->pTileInfo->banks; in HwlComputeHtileAddrFromCoord()
712 pOut->tcCompatible = CheckTcCompatibility(pOut->pTileInfo, pIn->bpp, pOut->tileMode, pOut->tileType, pOut); in HwlComputeSurfaceInfo()
737 localIn.pTileInfo = NULL; in HwlComputeSurfaceInfo()
755 localIn.pTileInfo = NULL; in HwlComputeSurfaceInfo()
792 // Use internal tile info if pOut does not have a valid pTileInfo in HwlComputeFmaskInfo()
793 if (pOut->pTileInfo == NULL) in HwlComputeFmaskInfo()
795 pOut->pTileInfo in HwlComputeFmaskInfo()
1261 ADDR_TILEINFO* pTileInfo = pTileInfoOut; HwlSetupTileInfo() local
1810 HwlComputeMacroModeIndex( INT_32 tileIndex, ADDR_SURFACE_FLAGS flags, UINT_32 bpp, UINT_32 numSamples, ADDR_TILEINFO* pTileInfo, AddrTileMode* pTileMode, AddrTileType* pTileType ) const HwlComputeMacroModeIndex() argument
2103 HwlPadDimensions( AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, UINT_32 numSamples, ADDR_TILEINFO* pTileInfo, UINT_32 mipLevel, UINT_32* pPitch, UINT_32* pPitchAlign, UINT_32 height, UINT_32 heightAlign ) const HwlPadDimensions() argument
2304 CheckTcCompatibility( const ADDR_TILEINFO* pTileInfo, UINT_32 bpp, AddrTileMode tileMode, AddrTileType tileType, const ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut ) const CheckTcCompatibility() argument
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H A Dsiaddrlib.h124 ADDR_TILEINFO* pTileInfo, UINT_32* pBitPosition) const;
129 ADDR_TILEINFO* pTileInfo, UINT_32* pX, UINT_32* pY, UINT_32* pSlice) const;
150 UINT_32 bpp, ADDR_TILEINFO* pTileInfo) const;
158 ADDR_TILEINFO* pTileInfo, ADDR_EQUATION* pEquation) const;
162 ADDR_TILEINFO* pTileInfo, ADDR_EQUATION* pEquation) const;
167 ADDR_TILEINFO* pTileInfo) const;
169 virtual UINT_32 HwlGetPipes(const ADDR_TILEINFO* pTileInfo) const;
216 ADDR_TILEINFO* pTileInfo) const in HwlSanityCheckMacroTiled()
233 ADDR_TILEINFO* pTileInfo) const;
236 UINT_32 tileX, UINT_32 bank, ADDR_TILEINFO* pTileInfo) cons
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H A Dciaddrlib.h87 UINT_32 bpp, ADDR_TILEINFO* pTileInfo) const;
91 ADDR_TILEINFO* pTileInfo, AddrTileMode* pTileMode = NULL, AddrTileType* pTileType = NULL
145 UINT_32 numSamples, ADDR_TILEINFO* pTileInfo, UINT_32 mipLevel,
182 BOOL_32 CheckTcCompatibility(const ADDR_TILEINFO* pTileInfo, UINT_32 bpp, AddrTileMode tileMode,
/third_party/mesa3d/src/amd/addrlib/src/core/
H A Daddrlib1.cpp209 if (pIn->pTileInfo) in ComputeSurfaceInfo()
211 tileInfoNull = *pIn->pTileInfo; in ComputeSurfaceInfo()
213 localIn.pTileInfo = &tileInfoNull; in ComputeSurfaceInfo()
298 // Make sure pTileInfo is not NULL in ComputeSurfaceInfo()
299 ADDR_ASSERT(localIn.pTileInfo); in ComputeSurfaceInfo()
312 localIn.pTileInfo, in ComputeSurfaceInfo()
322 localIn.pTileInfo, in ComputeSurfaceInfo()
471 input.pTileInfo = &tileInfoNull; in ComputeSurfaceAddrFromCoord()
481 input.pTileInfo, in ComputeSurfaceAddrFromCoord()
489 input.pTileInfo, in ComputeSurfaceAddrFromCoord()
1758 ComputeTileDataWidthAndHeight( UINT_32 bpp, UINT_32 cacheBits, ADDR_TILEINFO* pTileInfo, UINT_32* pMacroWidth, UINT_32* pMacroHeight ) const ComputeTileDataWidthAndHeight() argument
1827 ComputeHtileInfo( ADDR_HTILE_FLAGS flags, UINT_32 pitchIn, UINT_32 heightIn, UINT_32 numSlices, BOOL_32 isLinear, BOOL_32 isWidth8, BOOL_32 isHeight8, ADDR_TILEINFO* pTileInfo, UINT_32* pPitchOut, UINT_32* pHeightOut, UINT_64* pHtileBytes, UINT_32* pMacroWidth, UINT_32* pMacroHeight, UINT_64* pSliceSize, UINT_32* pBaseAlign ) const ComputeHtileInfo() argument
1965 ComputeCmaskInfo( ADDR_CMASK_FLAGS flags, UINT_32 pitchIn, UINT_32 heightIn, UINT_32 numSlices, BOOL_32 isLinear, ADDR_TILEINFO* pTileInfo, UINT_32* pPitchOut, UINT_32* pHeightOut, UINT_64* pCmaskBytes, UINT_32* pMacroWidth, UINT_32* pMacroHeight, UINT_64* pSliceSize, UINT_32* pBaseAlign, UINT_32* pBlockMax ) const ComputeCmaskInfo() argument
2174 HwlComputeXmaskCoordFromAddr( UINT_64 addr, UINT_32 bitPosition, UINT_32 pitch, UINT_32 height, UINT_32 numSlices, UINT_32 factor, BOOL_32 isLinear, BOOL_32 isWidth8, BOOL_32 isHeight8, ADDR_TILEINFO* pTileInfo, UINT_32* pX, UINT_32* pY, UINT_32* pSlice ) const HwlComputeXmaskCoordFromAddr() argument
2356 HwlComputeXmaskAddrFromCoord( UINT_32 pitch, UINT_32 height, UINT_32 x, UINT_32 y, UINT_32 slice, UINT_32 numSlices, UINT_32 factor, BOOL_32 isLinear, BOOL_32 isWidth8, BOOL_32 isHeight8, ADDR_TILEINFO* pTileInfo, UINT_32* pBitPosition ) const HwlComputeXmaskAddrFromCoord() argument
3259 PadDimensions( AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, UINT_32 numSamples, ADDR_TILEINFO* pTileInfo, UINT_32 padDims, UINT_32 mipLevel, UINT_32* pPitch, UINT_32* pPitchAlign, UINT_32* pHeight, UINT_32 heightAlign, UINT_32* pSlices, UINT_32 sliceAlign ) const PadDimensions() argument
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H A Daddrlib1.h227 UINT_32 bankSwizzle, UINT_32 pipeSwizzle, ADDR_TILEINFO* pTileInfo,
237 BOOL_32 isTcCompatible, BOOL_32 isLinear, ADDR_TILEINFO* pTileInfo) const = 0;
319 ADDR_TILEINFO* pTileInfo,
328 ADDR_TILEINFO* pTileInfo, UINT_32* pPitchOut, UINT_32* pHeightOut, UINT_64* pCmaskBytes,
334 UINT_32 bpp, ADDR_TILEINFO* pTileInfo) const;
340 BOOL_32 isHeight8, ADDR_TILEINFO* pTileInfo,
346 ADDR_TILEINFO* pTileInfo, UINT_32* pX, UINT_32* pY, UINT_32* pSlice) const;
377 UINT_32 numSamples, ADDR_TILEINFO* pTileInfo, UINT_32 padDims, UINT_32 mipLevel,
383 UINT_32 numSamples, ADDR_TILEINFO* pTileInfo, UINT_32 mipLevel, in HwlPadDimensions()
427 const ADDR_TILEINFO* pTileInfo) cons
381 HwlPadDimensions( AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, UINT_32 numSamples, ADDR_TILEINFO* pTileInfo, UINT_32 mipLevel, UINT_32* pPitch, UINT_32* pPitchAlign, UINT_32 height, UINT_32 heightAlign) const HwlPadDimensions() argument
432 ComputePipeEquation( UINT_32 log2BytesPP, UINT_32 threshX, UINT_32 threshY, ADDR_TILEINFO* pTileInfo, ADDR_EQUATION* pEquation) const ComputePipeEquation() argument
479 HwlComputeMacroModeIndex( INT_32 index, ADDR_SURFACE_FLAGS flags, UINT_32 bpp, UINT_32 numSamples, ADDR_TILEINFO* pTileInfo, AddrTileMode *pTileMode = NULL, AddrTileType *pTileType = NULL ) const HwlComputeMacroModeIndex() argument
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/third_party/mesa3d/src/amd/addrlib/inc/
H A Daddrinterface.h567 ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Set to 0 to default/calculate member
617 ADDR_TILEINFO* pTileInfo; ///< Tile parameters used. Filled in if 0 on input member
706 ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Client must provide all data member
794 ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Client must provide all data member
884 ADDR_TILEINFO* pTileInfo; ///< Tile info member
958 ADDR_TILEINFO* pTileInfo; ///< Tile info member
1021 ADDR_TILEINFO* pTileInfo; ///< Tile info member
1102 ADDR_TILEINFO* pTileInfo; ///< Tile info member
1173 ADDR_TILEINFO* pTileInfo; ///< Tile info member
1232 ADDR_TILEINFO* pTileInfo; ///< Til member
1304 ADDR_TILEINFO* pTileInfo; ///< 2D tiling parameters. Clients must give valid data global() member
1332 ADDR_TILEINFO* pTileInfo; ///< Tile parameters used. Fmask can have different global() member
1398 ADDR_TILEINFO* pTileInfo; ///< 2D tiling parameters. Client must provide all data global() member
1470 ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Client must provide all data global() member
1557 ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Client must provide all data global() member
1614 ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Client must provide all data global() member
1674 ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Actually banks needed here! global() member
1767 ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Actually banks needed here! global() member
1993 ADDR_TILEINFO* pTileInfo; ///< Tile parameters with real value global() member
2015 ADDR_TILEINFO* pTileInfo; ///< Tile parameters with hardware register value global() member
2066 ADDR_TILEINFO* pTileInfo; ///< Tile info global() member
2174 ADDR_TILEINFO* pTileInfo; ///< Pointer to tile-info structure, can be NULL for linear/1D global() member
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/third_party/mesa3d/src/amd/common/
H A Dac_surface.c746 AddrDccIn->tileInfo = *AddrSurfInfoOut->pTileInfo; in gfx6_compute_level()
788 AddrDccIn->tileInfo = *AddrSurfInfoOut->pTileInfo; in gfx6_compute_level()
825 AddrHtileIn->pTileInfo = AddrSurfInfoOut->pTileInfo; in gfx6_compute_level()
909 surf->u.legacy.pipe_config = csio->pTileInfo->pipeConfig - 1; in gfx6_surface_settings()
914 surf->u.legacy.bankw = csio->pTileInfo->bankWidth; in gfx6_surface_settings()
915 surf->u.legacy.bankh = csio->pTileInfo->bankHeight; in gfx6_surface_settings()
916 surf->u.legacy.mtilea = csio->pTileInfo->macroAspectRatio; in gfx6_surface_settings()
917 surf->u.legacy.tile_split = csio->pTileInfo->tileSplitBytes; in gfx6_surface_settings()
918 surf->u.legacy.num_banks = csio->pTileInfo in gfx6_surface_settings()
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