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Searched refs:num_records (Results 1 - 15 of 15) sorted by relevance

/third_party/skia/third_party/externals/freetype/src/truetype/
H A Dttpload.c526 FT_UInt nn, num_records; in FT_LOCAL_DEF() local
547 num_records = FT_NEXT_USHORT( p ); in FT_LOCAL_DEF()
564 /* The limit for `num_records' is a heuristic value. */ in FT_LOCAL_DEF()
565 if ( num_records > 255 || in FT_LOCAL_DEF()
566 ( num_records > 0 && in FT_LOCAL_DEF()
574 if ( FT_QNEW_ARRAY( face->hdmx_record_sizes, num_records ) ) in FT_LOCAL_DEF()
577 for ( nn = 0; nn < num_records; nn++ ) in FT_LOCAL_DEF()
/third_party/mesa3d/src/microsoft/compiler/
H A Ddxil_container.c116 collect_semantic_names(unsigned num_records, in collect_semantic_names() argument
125 for (unsigned i = 0; i < num_records; ++i) { in collect_semantic_names()
142 unsigned num_records, in dxil_container_add_io_signature()
156 for (unsigned i = 0; i < num_records; ++i) { in dxil_container_add_io_signature()
167 uint32_t last_offset = collect_semantic_names(num_records, io_data, in dxil_container_add_io_signature()
179 for (unsigned i = 0; i < num_records; ++i) in dxil_container_add_io_signature()
140 dxil_container_add_io_signature(struct dxil_container *c, enum dxil_part_fourcc part, unsigned num_records, struct dxil_signature_record *io_data, bool validator_7) dxil_container_add_io_signature() argument
H A Ddxil_container.h115 unsigned num_records,
/third_party/mesa3d/src/amd/vulkan/
H A Dradv_device_generated_commands.c439 nir_variable *num_records = nir_variable_create(b.shader, nir_var_shader_temp, in build_dgc_prepare_shader() local
440 glsl_uint_type(), "num_records"); in build_dgc_prepare_shader()
441 nir_store_var(&b, num_records, size, 0x1); in build_dgc_prepare_shader()
451 nir_push_if(&b, nir_ult(&b, nir_load_var(&b, num_records), attrib_end)); in build_dgc_prepare_shader()
453 nir_store_var(&b, num_records, nir_imm_int(&b, 0), 0x1); in build_dgc_prepare_shader()
458 nir_store_var(&b, num_records, nir_imm_int(&b, 1), 0x1); in build_dgc_prepare_shader()
466 nir_udiv(&b, nir_isub(&b, nir_load_var(&b, num_records), attrib_end), in build_dgc_prepare_shader()
470 nir_store_var(&b, num_records, r, 0x1); in build_dgc_prepare_shader()
476 nir_ine_imm(&b, nir_load_var(&b, num_records), 0); in build_dgc_prepare_shader()
484 &b, nir_imul(&b, nir_iadd_imm(&b, nir_load_var(&b, num_records), in build_dgc_prepare_shader()
526 nir_ssa_def *num_records = nir_channel(&b, nir_load_var(&b, vbo_data), 2); build_dgc_prepare_shader() local
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H A Dradv_cmd_buffer.c3720 unsigned num_records; in radv_write_vertex_descriptors() local
3779 num_records = cmd_buffer->vertex_bindings[binding].size; in radv_write_vertex_descriptors()
3781 num_records = vk_buffer_range(&buffer->vk, offset, VK_WHOLE_SIZE); in radv_write_vertex_descriptors()
3788 if (num_records < attrib_end) { in radv_write_vertex_descriptors()
3789 num_records = 0; /* not enough space for one vertex */ in radv_write_vertex_descriptors()
3791 num_records = 1; /* only one vertex */ in radv_write_vertex_descriptors()
3793 num_records = (num_records - attrib_end) / stride + 1; in radv_write_vertex_descriptors()
3798 num_records += pipeline->attrib_index_offset[i]; in radv_write_vertex_descriptors()
3801 /* GFX10 uses OOB_SELECT_RAW if stride==0, so convert num_records fro in radv_write_vertex_descriptors()
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H A Dradv_nir_to_llvm.c1241 unsigned num_records = ctx->ac.wave_size; in ac_setup_rings() local
1276 LLVMConstInt(ctx->ac.i32, num_records, false), in ac_setup_rings()
/third_party/mesa3d/src/gallium/drivers/radeonsi/
H A Dsi_shader_llvm_gs.c327 unsigned num_records; in si_preload_gs_rings() local
339 num_records = ctx->ac.wave_size; in si_preload_gs_rings()
353 ring = LLVMBuildInsertElement(builder, ring, LLVMConstInt(ctx->ac.i32, num_records, 0), in si_preload_gs_rings()
H A Dsi_state_draw.cpp1826 int64_t num_records = (int64_t)buf->b.b.width0 - offset;
1829 num_records = (num_records - velems->format_size[index]) / vb->stride + 1;
1831 assert(num_records >= 0 && num_records <= UINT_MAX);
1845 desc[2] = num_records;
H A Dsi_state.h503 unsigned stride, unsigned num_records, bool add_tid, bool swizzle,
H A Dsi_descriptors.c1481 unsigned stride, unsigned num_records, bool add_tid, bool swizzle, in si_set_ring_buffer()
1535 num_records *= stride; in si_set_ring_buffer()
1541 desc[2] = num_records; in si_set_ring_buffer()
1480 si_set_ring_buffer(struct si_context *sctx, uint slot, struct pipe_resource *buffer, unsigned stride, unsigned num_records, bool add_tid, bool swizzle, unsigned element_size, unsigned index_stride, uint64_t offset) si_set_ring_buffer() argument
H A Dsi_state.c3906 unsigned num_records; in si_make_buffer_descriptor() local
3911 num_records = num_elements; in si_make_buffer_descriptor()
3912 num_records = MIN2(num_records, (buf->b.b.width0 - offset) / stride); in si_make_buffer_descriptor()
3938 num_records *= stride; in si_make_buffer_descriptor()
3942 state[6] = num_records; in si_make_buffer_descriptor()
/third_party/mesa3d/src/gallium/auxiliary/driver_ddebug/
H A Ddd_pipe.h323 unsigned num_records; member
H A Ddd_draw.c1112 dctx->num_records = 0; in dd_thread_main()
1190 if (unlikely(dctx->num_records > 10000)) { in dd_add_record()
1202 dctx->num_records++; in dd_add_record()
/third_party/mesa3d/src/amd/common/
H A Dac_rgp.c1144 uint32_t num_records = 0; in ac_sqtt_dump_data() local
1151 ac_sqtt_fill_clock_calibration(&clock_calibration, num_records); in ac_sqtt_dump_data()
1160 num_records++; in ac_sqtt_dump_data()
/third_party/libbpf/src/
H A Dbtf.c2972 __u32 num_records; local
2980 num_records = sinfo->num_info;
2981 if (num_records == 0) {
2982 pr_debug("%s section has incorrect num_records in .BTF.ext\n",
2987 total_record_size = sec_hdrlen + (__u64)num_records * record_size;
2989 pr_debug("%s section has incorrect num_records in .BTF.ext\n",

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