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Searched refs:nir_imul_imm (Results 1 - 25 of 41) sorted by relevance

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/third_party/mesa3d/src/amd/common/
H A Dac_nir_lower_tess_io_to_mem.c338 nir_ssa_def *patch_offset = nir_imul_imm(b, rel_patch_id, output_patch_stride); in hs_output_lds_offset()
354 nir_ssa_def *vertex_index_off = nir_imul_imm(b, vertex_index, output_vertex_size); in hs_output_lds_offset()
374 nir_ssa_def *attr_stride = nir_imul(b, tcs_num_patches, nir_imul_imm(b, out_vertices_per_patch, 16u)); in hs_per_vertex_output_vmem_offset()
378 nir_ssa_def *patch_offset = nir_imul(b, rel_patch_id, nir_imul_imm(b, out_vertices_per_patch, 16u)); in hs_per_vertex_output_vmem_offset()
381 nir_ssa_def *vertex_index_off = nir_imul_imm(b, vertex_index, 16u); in hs_per_vertex_output_vmem_offset()
396 ? ac_nir_calc_io_offset(b, intrin, nir_imul_imm(b, tcs_num_patches, 16u), 4u, st->map_io) in hs_per_patch_output_vmem_offset()
400 off = nir_iadd_nuw(b, off, nir_imul_imm(b, tcs_num_patches, const_base_offset)); in hs_per_patch_output_vmem_offset()
403 nir_ssa_def *patch_offset = nir_imul_imm(b, rel_patch_id, 16u); in hs_per_patch_output_vmem_offset()
583 nir_ssa_def *tess_factors_offset = nir_imul_imm(b, rel_patch_id, (inner_comps + outer_comps) * 4u); in hs_emit_write_tess_factors()
H A Dac_nir_lower_taskmesh_io_to_mem.c241 nir_ssa_def *scalar_off = nir_imul_imm(b, ptr, s->draw_entry_bytes); in task_write_draw_ring()
306 nir_ssa_def *ring_off = nir_imul_imm(b, ptr, s->payload_entry_bytes); in lower_task_payload_store()
331 nir_ssa_def *ring_off = nir_imul_imm(b, ptr, s->payload_entry_bytes); in lower_taskmesh_payload_load()
H A Dac_nir.c55 nir_ssa_def *base_op = nir_imul_imm(b, base_stride, mapped_driver_location); in ac_nir_calc_io_offset()
H A Dac_nir_lower_esgs_io_to_mem.c176 nir_ssa_def *off = nir_iadd(b, nir_imul_imm(b, vertex_idx, st->esgs_itemsize), io_off); in lower_es_output_store()
265 return nir_imul_imm(b, off, 4u); in gs_per_vertex_input_offset()
H A Dac_nir_lower_ngg.c237 nir_ssa_def *shift = nir_iadd_imm(b, nir_imul_imm(b, lane_id, -4u), num_lds_dwords * 16); in summarize_repack()
366 return nir_imul_imm(b, vertex_idx, per_vtx_bytes); in pervertex_lds_addr()
1592 nir_ssa_def *out_vtx_offs = nir_imul_imm(b, out_vtx_idx, s->lds_bytes_per_gs_out_vertex); in ngg_gs_out_vertex_addr()
1600 nir_ssa_def *gs_out_vtx_base = nir_imul_imm(b, tid_in_tg, b->shader->info.gs.vertices_out); in ngg_gs_emit_vertex_addr()
1645 num_prims_in_wave = nir_imul_imm(b, num_threads, total_prm_cnt); in ngg_gs_shader_query()
1650 prm_cnt = nir_iadd(b, nir_imul_imm(b, prm_cnt, -1u * (s->num_vertices_per_primitive - 1)), gs_vtx_cnt); in ngg_gs_shader_query()
2226 nir_ssa_def *arr_index_off = nir_imul_imm(b, arr_index, arr_index_stride); in ms_arrayed_output_base_addr()
2374 nir_ssa_def *base_addr_off = nir_imul_imm(b, base_offset, 16u); in ms_store_arrayed_output_intrin()
2427 nir_ssa_def *base_addr_off = nir_imul_imm(b, base_offset, 16); in ms_load_arrayed_output()
2752 nir_ssa_def *prim_idx_addr = nir_imul_imm( in emit_ms_finale()
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/third_party/mesa3d/src/intel/compiler/
H A Dbrw_nir_lower_alpha_to_coverage.c75 return nir_ior(b, nir_imul_imm(b, part_a, 0x1111), in build_dither_mask()
76 nir_ior(b, nir_imul_imm(b, part_b, 0x0808), in build_dither_mask()
77 nir_imul_imm(b, part_c, 0x0100))); in build_dither_mask()
H A Dbrw_nir_lower_rt_intrinsics.c267 sysval = nir_imul_imm(b, globals.hw_stack_size, 64); in lower_rt_intrinsics_impl()
271 sysval = nir_imul_imm(b, globals.sw_stack_size, 64); in lower_rt_intrinsics_impl()
H A Dbrw_nir_lower_ray_queries.c135 nir_imul_imm(b, index, local_state_offset)); in get_ray_query_shadow_addr()
153 nir_imul_imm( in get_ray_query_shadow_addr()
H A Dbrw_nir_rt_builder.h165 return nir_imul_imm(b, nir_load_ray_num_dss_rt_stacks_intel(b), in brw_nir_num_rt_stacks()
174 nir_imul_imm(b, brw_nir_rt_async_stack_id(b), in brw_nir_rt_sw_hotzone_addr()
178 nir_imul_imm(b, brw_nir_num_rt_stacks(b, devinfo), in brw_nir_rt_sw_hotzone_addr()
363 nir_ssa_def *ptr64 = nir_imul_imm(b, nir_pack_64_2x32(b, vec2), 64); in brw_nir_rt_unpack_leaf_ptr()
/third_party/mesa3d/src/amd/vulkan/
H A Dradv_meta_etc_decode.c105 return nir_ubfe(b, result, nir_imul_imm(b, y, 4), nir_imm_int(b, 4)); in etc1_alpha_modifier_lookup()
112 return nir_imul_imm(b, v, 0x11); in etc_extend()
123 nir_ssa_def *bit_offset = nir_isub_imm(b, 45, nir_imul_imm(b, linear_pixel, 3)); in decode_etc2_alpha()
130 signed_base = nir_imul_imm(b, signed_base, 8); in decode_etc2_alpha()
131 base = nir_iadd_imm(b, nir_imul_imm(b, base, 8), 4); in decode_etc2_alpha()
133 multiplier = nir_imax(b, nir_imul_imm(b, multiplier, 8), nir_imm_int(b, 1)); in decode_etc2_alpha()
256 nir_ssa_def *linear_pixel = nir_iadd(&b, nir_imul_imm(&b, nir_channel(&b, pixel_coord, 0), 4), in build_shader()
326 nir_isub_imm(&b, 28 - 8 * i, nir_imul_imm(&b, subblock, 4))), in build_shader()
387 nir_ssa_def *d = nir_iadd(&b, da, nir_imul_imm(&b, db, 2)); in build_shader()
398 nir_imul(&b, dist, nir_isub_imm(&b, 1, nir_imul_imm( in build_shader()
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H A Dradv_meta_buffer.c20 nir_imul_imm(&b, nir_channel(&b, nir_load_workgroup_id(&b, 32), 0), in build_buffer_fill_shader()
24 nir_ssa_def *offset = nir_imin(&b, nir_imul_imm(&b, global_id, 16), size_minus16); in build_buffer_fill_shader()
45 nir_imul_imm(&b, nir_channel(&b, nir_load_workgroup_id(&b, 32), 0), in build_buffer_copy_shader()
49 nir_ssa_def *offset = nir_u2u64(&b, nir_imin(&b, nir_imul_imm(&b, global_id, 16), size_minus16)); in build_buffer_copy_shader()
H A Dradv_acceleration_structure.c1087 return nir_imul_imm(b, global_id, stride); in id_to_node_id_offset()
1100 return nir_iadd_imm(b, nir_imul_imm(b, global_id, stride), sizeof(uint32_t)); in id_to_morton_offset()
1167 nir_imul_imm(&b, nir_channels(&b, nir_load_workgroup_id(&b, 32), 1), in build_leaf_shader()
1191 nir_ssa_def *node_offset = nir_iadd(&b, node_dst_offset, nir_imul_imm(&b, global_id, 64)); in build_leaf_shader()
1270 nir_ssa_def *node_offset = nir_iadd(&b, node_dst_offset, nir_imul_imm(&b, global_id, 64)); in build_leaf_shader()
1310 nir_u2u64(&b, nir_imul_imm(&b, global_id, 8))); in build_leaf_shader()
1318 nir_u2u64(&b, nir_imul_imm(&b, global_id, 64))); in build_leaf_shader()
1330 nir_ssa_def *node_offset = nir_iadd(&b, node_dst_offset, nir_imul_imm(&b, global_id, 128)); in build_leaf_shader()
1490 x = nir_iand_imm(b, nir_imul_imm(b, x, 0x00000101u), 0x0F00F00Fu); in build_morton_component()
1491 x = nir_iand_imm(b, nir_imul_imm( in build_morton_component()
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H A Dradv_nir_apply_pipeline_layout.c91 nir_ssa_def *binding_ptr = nir_imul_imm(b, intrin->src[0].ssa, stride); in visit_vulkan_resource_index()
116 nir_ssa_def *index = nir_imul_imm(b, intrin->src[1].ssa, 16); in visit_vulkan_resource_reindex()
293 nir_ssa_def *tmp = nir_imul_imm(b, deref->arr.index.ssa, array_size); in get_sampler_desc()
H A Dradv_device_generated_commands.c399 nir_ssa_def *vbo_offset = nir_imul_imm(&b, nir_load_var(&b, vbo_idx), 16); in build_dgc_prepare_shader()
415 nir_iadd(&b, nir_imul_imm(&b, vbo_cnt, 16), in build_dgc_prepare_shader()
416 nir_imul_imm(&b, nir_load_var(&b, vbo_idx), 8)); in build_dgc_prepare_shader()
565 nir_iadd(&b, nir_load_var(&b, upload_offset), nir_imul_imm(&b, vbo_cnt, 16)), in build_dgc_prepare_shader()
584 nir_ssa_def *param_offset = nir_imul_imm(&b, vbo_cnt, 24); in build_dgc_prepare_shader()
645 nir_ssa_def *reg_info = nir_load_ssbo(&b, 3, 32, param_buf, nir_iadd(&b, param_offset, nir_imul_imm(&b, cur_shader_idx, 12)), .align_mul = 4); in build_dgc_prepare_shader()
767 nir_ssa_def *param_offset = nir_iadd(&b, scissor_offset, nir_imul_imm(&b, cur_idx, 4)); in build_dgc_prepare_shader()
824 &b, nir_ushr(&b, nir_imm_int(&b, 0x142), nir_imul_imm(&b, index_type, 4)), 0xf); in build_dgc_prepare_shader()
/third_party/mesa3d/src/compiler/nir/tests/
H A Dload_store_vectorizer_tests.cpp606 nir_ssa_def *index_base = nir_imul_imm(b, inv, 0xfffffffc); in TEST_F()
607 nir_ssa_def *index_base_prev = nir_imul_imm(b, inv_plus_one, 0xfffffffc); in TEST_F()
1589 nir_iadd_imm(b, nir_imul_imm(b, nir_iadd_imm(b, index_base, 2), 16), 32), 0x1); in TEST_F()
1591 nir_iadd_imm(b, nir_imul_imm(b, nir_iadd_imm(b, index_base, 3), 16), 32), 0x2); in TEST_F()
1605 nir_ssa_def *low = nir_iadd_imm(b, nir_imul_imm(b, index_base, 16), 12); in TEST_F()
1606 nir_ssa_def *high = nir_imul_imm(b, nir_iadd_imm(b, index_base, 1), 16); in TEST_F()
1660 nir_ssa_def *offset = nir_iadd_imm(b, nir_imul_imm(b, index_base, 16), 4); in TEST_F()
1686 nir_ssa_def *offset = nir_iadd_imm(b, nir_imul_imm(b, index_base, 16), 16); in TEST_F()
1703 nir_ssa_def *offset = nir_iadd_imm(b, nir_imul_imm(b, index_base, 16), 16); in TEST_F()
1836 nir_ssa_def *first = nir_imul_imm( in TEST_F()
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/third_party/mesa3d/src/microsoft/vulkan/
H A Ddzn_nir.c200 exec_vals[3] = nir_imul_imm(&b, triangle_count, 3); in dzn_nir_indirect_draw_shader()
406 nir_imul_imm(&b, old_index_ptr, old_index_size); in dzn_nir_triangle_fan_prim_restart_rewrite_index_shader()
453 nir_ssa_def *new_index_offset = nir_imul_imm(&b, new_index_ptr, sizeof(uint32_t)); in dzn_nir_triangle_fan_prim_restart_rewrite_index_shader()
505 nir_imul_imm(&b, old_first_index, old_index_size); in dzn_nir_triangle_fan_rewrite_index_shader()
507 nir_imul_imm(&b, nir_iadd(&b, nir_iadd_imm(&b, triangle, 1), old_first_index), in dzn_nir_triangle_fan_rewrite_index_shader()
550 nir_imul_imm(&b, triangle, 4 * 3); in dzn_nir_triangle_fan_rewrite_index_shader()
584 nir_ssa_def *base = nir_imul_imm(&b, vertex, 4 * sizeof(float)); in dzn_nir_blit_vs()
/third_party/mesa3d/src/panfrost/util/
H A Dpan_lower_sample_position.c51 nir_u2u64(b, nir_imul_imm(b, nir_load_sample_id(b), 4))); in pan_lower_sample_pos_impl()
H A Dpan_lower_xfb.c54 nir_imul_imm(b, index, stride), in lower_xfb_output()
/third_party/mesa3d/src/gallium/drivers/lima/ir/
H A Dlima_nir_lower_uniform_to_scalar.c47 nir_src_for_ssa(nir_imul_imm(b, intr->src[0].ssa, 4)); in lower_load_uniform_to_scalar()
/third_party/mesa3d/src/panfrost/lib/
H A Dpan_indirect_draw.c424 nir_imul_imm(b, builder->draw.vertex_start, index_size); in update_job()
593 nir_imul_imm(b, attrib_idx, in update_vertex_attribs()
597 nir_imul_imm(b, attrib_idx, in update_vertex_attribs()
857 nir_imul_imm(b, builder->draw.vertex_start, index_size)); in get_instance_size()
861 nir_imul_imm(b, builder->draw.vertex_count, index_size)); in get_instance_size()
1027 nir_imul_imm(b, builder->draw.vertex_start, index_size)); in get_index_min_max()
1032 nir_iadd(b, start, nir_imul_imm(b, builder->draw.vertex_count, index_size)); in get_index_min_max()
1041 start = nir_iadd(b, start, nir_imul_imm(b, thread_id, sizeof(uint32_t))); in get_index_min_max()
/third_party/mesa3d/src/compiler/nir/
H A Dnir_lower_uniforms_to_ubo.c76 nir_iadd_imm(b, nir_imul_imm(b, uniform_offset, multiplier), in lower_instr()
H A Dnir_lower_variable_initializers.c172 nir_ssa_def *first_offset = nir_imul_imm(&b, local_index, chunk_size); in nir_zero_initialize_shared_memory()
H A Dnir_lower_task_shader.c206 nir_ssa_def *addr = nir_imul_imm(b, invocation_index, bytes_per_copy); in emit_shared_to_payload_copy()
/third_party/mesa3d/src/broadcom/compiler/
H A Dv3d_nir_lower_scratch.c50 return nir_imul_imm(b, offset, V3D_CHANNELS); in v3d_nir_scratch_offset()
/third_party/mesa3d/src/intel/vulkan/
H A Danv_nir_compute_push_layout.c171 nir_imul_imm(b, intrin->src[0].ssa, sizeof(uint64_t)), in anv_nir_compute_push_layout()

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