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Searched refs:nblk_x (Results 1 - 25 of 26) sorted by relevance

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/third_party/mesa3d/src/gallium/winsys/radeon/drm/
H A Dradeon_drm_surface.c72 level_drm->nblk_x = level_ws->nblk_x; in surf_level_winsys_to_drm()
74 level_drm->pitch_bytes = level_ws->nblk_x * bpe; in surf_level_winsys_to_drm()
84 level_ws->nblk_x = level_drm->nblk_x; in surf_level_drm_to_winsys()
87 assert(level_drm->nblk_x * bpe == level_drm->pitch_bytes); in surf_level_drm_to_winsys()
260 unsigned width = align(surf->u.legacy.level[0].nblk_x, cl_width*8); in si_compute_cmask()
332 width = align(surf->u.legacy.level[0].nblk_x, cl_width * 8); in si_compute_htile()
407 (fmask.u.legacy.level[0].nblk_x * fmask.u.legacy.level[0].nblk_y) / 64; in radeon_winsys_surface_init()
413 surf_ws->u.legacy.color.fmask.pitch_in_pixels = fmask.u.legacy.level[0].nblk_x; in radeon_winsys_surface_init()
[all...]
H A Dradeon_drm_bo.c966 args.pitch = surf->u.legacy.level[0].nblk_x * surf->bpe; in radeon_bo_set_metadata()
/third_party/libdrm/radeon/
H A Dradeon_surface.c176 surflevel->nblk_x = (surflevel->npix_x + surf->blk_w - 1) / surf->blk_w; in surf_minify()
181 if (surflevel->nblk_x < xalign || surflevel->nblk_y < yalign) { in surf_minify()
186 surflevel->nblk_x = ALIGN(surflevel->nblk_x, xalign); in surf_minify()
191 surflevel->pitch_bytes = surflevel->nblk_x * bpe * surf->nsamples; in surf_minify()
585 surflevel->nblk_x = (surflevel->npix_x + surf->blk_w - 1) / surf->blk_w; in eg_surf_minify()
590 if (surflevel->nblk_x < mtilew || surflevel->nblk_y < mtileh) { in eg_surf_minify()
595 surflevel->nblk_x = ALIGN(surflevel->nblk_x, mtilew); in eg_surf_minify()
600 mtile_pr = surflevel->nblk_x / mtile in eg_surf_minify()
[all...]
H A Dradeon_surface.h75 uint32_t nblk_x; member
/third_party/mesa3d/src/gallium/drivers/radeonsi/
H A Dradeon_vce_40_2_2.c85 RVCE_CS(enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe); // encRefPicLumaPitch in create()
86 RVCE_CS(enc->chroma->u.legacy.level[0].nblk_x * enc->chroma->bpe); // encRefPicChromaPitch in create()
315 RVCE_CS(enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe); // encInputPicLumaPitch in encode()
316 RVCE_CS(enc->chroma->u.legacy.level[0].nblk_x * enc->chroma->bpe); // encInputPicChromaPitch in encode()
H A Dradeon_vce_50.c125 RVCE_CS(enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe); // encInputPicLumaPitch in encode()
126 RVCE_CS(enc->chroma->u.legacy.level[0].nblk_x * enc->chroma->bpe); // encInputPicChromaPitch in encode()
H A Dradeon_vce.c223 pitch = align(enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe, 128); in si_vce_frame_offset()
454 ? align(tmp_surf->u.legacy.level[0].nblk_x * tmp_surf->bpe, 128) * in si_vce_create_encoder()
H A Dradeon_uvd_enc_1_1.c760 enc->enc_pic.ctx_buf.rec_luma_pitch = (enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe); in radeon_uvd_enc_ctx()
762 (enc->chroma->u.legacy.level[0].nblk_x * enc->chroma->bpe); in radeon_uvd_enc_ctx()
879 (enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe); in radeon_uvd_enc_encode_params_hevc()
881 (enc->chroma->u.legacy.level[0].nblk_x * enc->chroma->bpe); in radeon_uvd_enc_encode_params_hevc()
H A Dradeon_vce_52.c194 RVCE_CS(enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe); // encRefPicLumaPitch in create()
195 RVCE_CS(enc->chroma->u.legacy.level[0].nblk_x * enc->chroma->bpe); // encRefPicChromaPitch in create()
270 RVCE_CS(enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe); // encInputPicLumaPitch in encode()
271 RVCE_CS(enc->chroma->u.legacy.level[0].nblk_x * enc->chroma->bpe); // encInputPicChromaPitch in encode()
H A Dsi_sdma_copy_image.c241 unsigned dst_pitch = sdst->surface.u.legacy.level[0].nblk_x; in cik_sdma_copy_texture()
242 unsigned src_pitch = ssrc->surface.u.legacy.level[0].nblk_x; in cik_sdma_copy_texture()
H A Dradeon_uvd_enc.c325 ? align(tmp_surf->u.legacy.level[0].nblk_x * tmp_surf->bpe, 128) * in radeon_uvd_create_encoder()
H A Dsi_texture.c156 *stride = tex->surface.u.legacy.level[level].nblk_x * tex->surface.bpe; in si_texture_get_offset()
167 (box->y / tex->surface.blk_h * tex->surface.u.legacy.level[level].nblk_x + in si_texture_get_offset()
873 "npix_x=%u, npix_y=%u, npix_z=%u, nblk_x=%u, nblk_y=%u, " in si_print_texture_info()
878 u_minify(tex->buffer.b.b.depth0, i), tex->surface.u.legacy.level[i].nblk_x, in si_print_texture_info()
887 "npix_y=%u, npix_z=%u, nblk_x=%u, nblk_y=%u, " in si_print_texture_info()
893 tex->surface.u.legacy.zs.stencil_level[i].nblk_x, in si_print_texture_info()
H A Dradeon_vcn_enc.c504 ? align(tmp_surf->u.legacy.level[0].nblk_x * tmp_surf->bpe, 128) * in radeon_create_encoder()
H A Dsi_state.c2761 assert(levelinfo->nblk_x % 8 == 0 && levelinfo->nblk_y % 8 == 0); in si_init_depth_surface()
2797 surf->db_depth_size = S_028058_PITCH_TILE_MAX((levelinfo->nblk_x / 8) - 1) | in si_init_depth_surface()
2800 S_02805C_SLICE_TILE_MAX((levelinfo->nblk_x * levelinfo->nblk_y) / 64 - 1); in si_init_depth_surface()
3414 pitch_tile_max = level_info->nblk_x / 8 - 1; in si_emit_framebuffer_state()
3415 slice_tile_max = level_info->nblk_x * level_info->nblk_y / 64 - 1; in si_emit_framebuffer_state()
H A Dradeon_uvd.c1442 msg->body.decode.dt_pitch = luma->u.legacy.level[0].nblk_x * luma->blk_w; in si_uvd_set_dt_surfaces()
/third_party/mesa3d/src/gallium/drivers/r600/
H A Dr600_texture.c180 *stride = rtex->surface.u.legacy.level[level].nblk_x * in r600_texture_get_offset()
193 rtex->surface.u.legacy.level[level].nblk_x + in r600_texture_get_offset()
254 pitch_in_bytes_override != surface->u.legacy.level[0].nblk_x * bpe) { in r600_init_surface()
258 surface->u.legacy.level[0].nblk_x = pitch_in_bytes_override / bpe; in r600_init_surface()
289 metadata->u.legacy.stride = surface->u.legacy.level[0].nblk_x * surface->bpe; in r600_texture_init_metadata()
459 stride = rtex->surface.u.legacy.level[0].nblk_x * in r600_texture_get_info()
645 out->slice_tile_max = (fmask.u.legacy.level[0].nblk_x * fmask.u.legacy.level[0].nblk_y) / 64; in r600_texture_get_fmask_info()
650 out->pitch_in_pixels = fmask.u.legacy.level[0].nblk_x; in r600_texture_get_fmask_info()
791 width = align(rtex->surface.u.legacy.level[0].nblk_x, cl_width * 8); in r600_texture_get_htile_size()
862 "npix_x=%u, npix_y=%u, npix_z=%u, nblk_x in r600_print_texture_info()
[all...]
H A Dradeon_vce.c234 pitch = align(enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe, 128); in rvce_frame_offset()
455 cpb_size = align(tmp_surf->u.legacy.level[0].nblk_x * tmp_surf->bpe, 128) * in rvce_create_encoder()
H A Dr600_state.c731 pitch = tmp->surface.u.legacy.level[offset_level].nblk_x * util_format_get_blockwidth(state->format); in r600_create_sampler_view_custom()
836 pitch = rtex->surface.u.legacy.level[level].nblk_x / 8 - 1; in r600_init_color_surface()
837 slice = (rtex->surface.u.legacy.level[level].nblk_x * rtex->surface.u.legacy.level[level].nblk_y) / 64; in r600_init_color_surface()
1050 pitch = rtex->surface.u.legacy.level[level].nblk_x / 8 - 1; in r600_init_depth_surface()
1051 slice = (rtex->surface.u.legacy.level[level].nblk_x * rtex->surface.u.legacy.level[level].nblk_y) / 64; in r600_init_depth_surface()
2883 slice_tile_max = (rsrc->surface.u.legacy.level[src_level].nblk_x * rsrc->surface.u.legacy.level[src_level].nblk_y) / (8*8); in r600_dma_copy_tile()
2902 slice_tile_max = (rdst->surface.u.legacy.level[dst_level].nblk_x * rdst->surface.u.legacy.level[dst_level].nblk_y) / (8*8); in r600_dma_copy_tile()
2992 dst_pitch = rdst->surface.u.legacy.level[dst_level].nblk_x * rdst->surface.bpe; in r600_dma_copy()
2993 src_pitch = rsrc->surface.u.legacy.level[src_level].nblk_x * rsrc->surface.bpe; in r600_dma_copy()
H A Devergreen_state.c799 pitch = surflevel[base_level].nblk_x * util_format_get_blockwidth(params->pipe_format); in evergreen_fill_tex_resource_words()
1140 pitch = (rtex->surface.u.legacy.level[level].nblk_x) / 8 - 1; in evergreen_set_color_surface_common()
1141 slice = (rtex->surface.u.legacy.level[level].nblk_x * rtex->surface.u.legacy.level[level].nblk_y) / 64; in evergreen_set_color_surface_common()
1403 assert(levelinfo->nblk_x % 8 == 0 && levelinfo->nblk_y % 8 == 0); in evergreen_init_depth_surface()
1408 surf->db_depth_size = S_028058_PITCH_TILE_MAX(levelinfo->nblk_x / 8 - 1) | in evergreen_init_depth_surface()
1410 surf->db_depth_slice = S_02805C_SLICE_TILE_MAX(levelinfo->nblk_x * in evergreen_init_depth_surface()
3804 slice_tile_max = (rsrc->surface.u.legacy.level[src_level].nblk_x * rsrc->surface.u.legacy.level[src_level].nblk_y) / (8*8); in evergreen_dma_copy_tile()
3829 slice_tile_max = (rdst->surface.u.legacy.level[dst_level].nblk_x * rdst->surface.u.legacy.level[dst_level].nblk_y) / (8*8); in evergreen_dma_copy_tile()
3926 dst_pitch = rdst->surface.u.legacy.level[dst_level].nblk_x * rdst->surface.bpe; in evergreen_dma_copy()
3927 src_pitch = rsrc->surface.u.legacy.level[src_level].nblk_x * rsr in evergreen_dma_copy()
[all...]
H A Dradeon_uvd.c1209 msg->body.decode.dt_pitch = luma->u.legacy.level[0].nblk_x * luma->blk_w; in ruvd_set_dt_surfaces()
/third_party/mesa3d/src/amd/common/
H A Dac_surface.c679 AddrSurfInfoIn->basePitch = surf->u.legacy.zs.stencil_level[0].nblk_x; in gfx6_compute_level()
681 AddrSurfInfoIn->basePitch = surf->u.legacy.level[0].nblk_x; in gfx6_compute_level()
697 surf_level->nblk_x = AddrSurfInfoOut->pitch; in gfx6_compute_level()
727 if (surf_level->nblk_x >= surf->prt_tile_width && in gfx6_compute_level()
990 unsigned width = align(surf->u.legacy.level[0].nblk_x, cl_width * 8); in ac_compute_cmask()
1282 if (surf->u.legacy.zs.stencil_level[level].nblk_x != surf->u.legacy.level[level].nblk_x) in gfx6_compute_surface()
1285 surf->u.legacy.level[level].nblk_x = surf->u.legacy.zs.stencil_level[level].nblk_x; in gfx6_compute_surface()
2924 if (surf->u.legacy.level[0].nblk_x ! in ac_surface_override_offset_stride()
[all...]
H A Dac_surface.h95 unsigned nblk_x : 15; member
/third_party/mesa3d/src/amd/vulkan/
H A Dradv_image.c872 unsigned pitch = base_level_info->nblk_x * block_width; in si_set_mutable_tex_desc_fields()
1401 metadata->u.legacy.stride = surface->u.legacy.level[0].nblk_x * surface->bpe; in radv_init_metadata()
2456 pLayout->rowPitch = surface->u.legacy.level[level].nblk_x * surface->bpe; in radv_GetImageSubresourceLayout()
H A Dradv_device.c4850 pitch = surface->u.legacy.level[level].nblk_x; in radv_sparse_image_bind_memory()
6300 pitch_tile_max = level_info->nblk_x / 8 - 1; in radv_initialise_color_surface()
6301 slice_tile_max = (level_info->nblk_x * level_info->nblk_y) / 64 - 1; in radv_initialise_color_surface()
6701 ds->db_depth_size = S_028058_PITCH_TILE_MAX((level_info->nblk_x / 8) - 1) | in radv_initialise_ds_surface()
6704 S_02805C_SLICE_TILE_MAX((level_info->nblk_x * level_info->nblk_y) / 64 - 1); in radv_initialise_ds_surface()
H A Dradv_meta_bufimage.c1315 stride = surf->image->planes[0].surface.u.legacy.level[0].nblk_x * 3; in get_image_stride_for_r32g32b32()

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