| /third_party/node/deps/v8/src/compiler/ |
| H A D | machine-operator-reducer.cc | 356 Int64BinopMatcher msub(m.left().node()); in Reduce()
357 node->ReplaceInput(0, msub.left().node()); in Reduce()
358 node->ReplaceInput(1, msub.right().node()); in Reduce()
1966 Int32BinopMatcher msub(sub); in TryMatchWord32Ror()
1967 if (!msub.left().Is(32) || msub.right().node() != y) return NoChange(); in TryMatchWord32Ror()
2060 Int32BinopMatcher msub(m.left().node()); in ReduceWord32Equal()
2061 node->ReplaceInput(0, msub.left().node()); in ReduceWord32Equal()
2062 node->ReplaceInput(1, msub.right().node()); in ReduceWord32Equal()
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| /third_party/ffmpeg/libavcodec/aarch64/ |
| H A D | vp9mc_neon.S | 527 msub x0, x1, x4, x0
529 msub x2, x3, x4, x2
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| H A D | vp9mc_16bpp_neon.S | 506 msub x0, x1, x4, x0
508 msub x2, x3, x4, x2
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| /third_party/node/deps/v8/src/diagnostics/mips/ |
| H A D | disasm-mips.cc | 1584 Format(instr, "msub.s 'fd, 'fr, 'fs, 'ft"); in DecodeTypeRegister()
1587 Format(instr, "msub.d 'fd, 'fr, 'fs, 'ft"); in DecodeTypeRegister()
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| /third_party/icu/icu4c/source/i18n/ |
| H A D | decNumber.cpp | 824 const Unit *msua, *msub; /* -> operand msus */ in uprv_decNumberAnd() local
842 msub=ub+D2U(rhs->digits)-1; /* -> msu of rhs */ in uprv_decNumberAnd()
849 if (ub>msub) b=0; in uprv_decNumberAnd()
1840 const Unit *msua, *msub; /* -> operand msus */ in uprv_decNumberOr() local
1857 msub=ub+D2U(rhs->digits)-1; /* -> msu of rhs */ in uprv_decNumberOr()
1864 if (ub>msub) b=0; in uprv_decNumberOr()
3270 const Unit *msua, *msub; /* -> operand msus */ in uprv_decNumberXor() local
3287 msub=ub+D2U(rhs->digits)-1; /* -> msu of rhs */ in uprv_decNumberXor()
3294 if (ub>msub) b=0; in uprv_decNumberXor()
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| /third_party/node/deps/icu-small/source/i18n/ |
| H A D | decNumber.cpp | 824 const Unit *msua, *msub; /* -> operand msus */ in uprv_decNumberAnd() local
842 msub=ub+D2U(rhs->digits)-1; /* -> msu of rhs */ in uprv_decNumberAnd()
849 if (ub>msub) b=0; in uprv_decNumberAnd()
1840 const Unit *msua, *msub; /* -> operand msus */ in uprv_decNumberOr() local
1857 msub=ub+D2U(rhs->digits)-1; /* -> msu of rhs */ in uprv_decNumberOr()
1864 if (ub>msub) b=0; in uprv_decNumberOr()
3270 const Unit *msua, *msub; /* -> operand msus */ in uprv_decNumberXor() local
3287 msub=ub+D2U(rhs->digits)-1; /* -> msu of rhs */ in uprv_decNumberXor()
3294 if (ub>msub) b=0; in uprv_decNumberXor()
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| /third_party/skia/third_party/externals/icu/source/i18n/ |
| H A D | decNumber.cpp | 824 const Unit *msua, *msub; /* -> operand msus */ in uprv_decNumberAnd() local
842 msub=ub+D2U(rhs->digits)-1; /* -> msu of rhs */ in uprv_decNumberAnd()
849 if (ub>msub) b=0; in uprv_decNumberAnd()
1840 const Unit *msua, *msub; /* -> operand msus */ in uprv_decNumberOr() local
1857 msub=ub+D2U(rhs->digits)-1; /* -> msu of rhs */ in uprv_decNumberOr()
1864 if (ub>msub) b=0; in uprv_decNumberOr()
3270 const Unit *msua, *msub; /* -> operand msus */ in uprv_decNumberXor() local
3287 msub=ub+D2U(rhs->digits)-1; /* -> msu of rhs */ in uprv_decNumberXor()
3294 if (ub>msub) b=0; in uprv_decNumberXor()
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| /third_party/node/deps/v8/src/compiler/backend/arm64/ |
| H A D | instruction-selector-arm64.cc | 2475 Int32BinopMatcher msub(sub); in VisitWord32Compare()
2476 if (msub.left().Is(0)) { in VisitWord32Compare()
2478 node->ReplaceInput(1, msub.right().node()); in VisitWord32Compare()
2487 if (can_cover) sub->ReplaceInput(1, msub.left().node()); in VisitWord32Compare()
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| /third_party/vixl/test/aarch64/ |
| H A D | test-disasm-aarch64.cc | 465 TEST(msub) { in TEST()
468 COMPARE(msub(w0, w1, w2, w3), "msub w0, w1, w2, w3"); in TEST()
469 COMPARE(msub(w30, w21, w22, w16), "msub w30, w21, w22, w16"); in TEST()
470 COMPARE(msub(x0, x1, x2, x3), "msub x0, x1, x2, x3"); in TEST()
471 COMPARE(msub(x30, x21, x22, x16), "msub x30, x21, x22, x16"); in TEST()
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| H A D | test-trace-aarch64.cc | 250 __ msub(w22, w23, w24, w25); in GenerateTestSequenceBase()
251 __ msub(x26, x27, x28, x29); in GenerateTestSequenceBase()
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| H A D | test-cpu-features-aarch64.cc | 381 TEST_NONE(msub_0, msub(w0, w1, w2, w3))
382 TEST_NONE(msub_1, msub(x0, x1, x2, x3))
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| H A D | test-assembler-aarch64.cc | 1177 TEST(msub) { in TEST()
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| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | macro-assembler-arm64-inl.h | 836 msub(rd, rn, rm, ra); in Msub()
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| H A D | assembler-arm64.h | 744 void msub(const Register& rd, const Register& rn, const Register& rm,
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| H A D | assembler-arm64.cc | 1106 void Assembler::msub(const Register& rd, const Register& rn, const Register& rm, in msub() function in v8::internal::Assembler
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| /third_party/vixl/src/aarch64/ |
| H A D | assembler-aarch64.h | 1005 void msub(const Register& rd,
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| H A D | assembler-aarch64.cc | 921 void Assembler::msub(const Register& rd, in msub() function in vixl::aarch64::Assembler
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| H A D | macro-assembler-aarch64.h | 2281 msub(rd, rn, rm, ra); in Msub()
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