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Searched refs:mp_count (Results 1 - 8 of 8) sorted by relevance

/third_party/mesa3d/src/gallium/drivers/nouveau/nv50/
H A Dnv50_query_hw_sm.c312 unsigned mp_count) in nv50_hw_sm_query_read_data()
317 for (p = 0; p < mp_count; ++p) { in nv50_hw_sm_query_read_data()
339 unsigned mp_count = MIN2(nv50->screen->MPsInTP, 32); in nv50_hw_sm_get_query_result() local
346 ret = nv50_hw_sm_query_read_data(count, nv50, wait, hq, cfg, mp_count); in nv50_hw_sm_get_query_result()
351 for (p = 0; p < mp_count; ++p) in nv50_hw_sm_get_query_result()
308 nv50_hw_sm_query_read_data(uint32_t count[32][4], struct nv50_context *nv50, bool wait, struct nv50_hw_query *hq, const struct nv50_hw_sm_query_cfg *cfg, unsigned mp_count) nv50_hw_sm_query_read_data() argument
H A Dnv50_screen.h78 unsigned mp_count; member
H A Dnv50_screen.c603 RET((uint32_t []) { screen->mp_count }); in nv50_screen_get_compute_param()
1157 screen->mp_count = screen->TPs * screen->MPsInTP; in nv50_screen_create()
/third_party/mesa3d/src/gallium/drivers/nouveau/nvc0/
H A Dnvc0_query_hw_sm.c2342 for (i = 0; i < screen->mp_count; ++i) in nve4_hw_sm_begin_query()
2419 for (i = 0; i < screen->mp_count; ++i) { in nvc0_hw_sm_begin_query()
2547 const uint grid[3] = { screen->mp_count, screen->gpc_count, 1 }; in nvc0_hw_sm_end_query()
2627 unsigned mp_count) in nvc0_hw_sm_query_read_data()
2632 for (p = 0; p < mp_count; ++p) { in nvc0_hw_sm_query_read_data()
2653 unsigned mp_count) in nve4_hw_sm_query_read_data()
2658 for (p = 0; p < mp_count; ++p) { in nve4_hw_sm_query_read_data()
2686 unsigned mp_count = MIN2(nvc0->screen->mp_count_compute, 32); in nvc0_hw_sm_get_query_result() local
2694 ret = nve4_hw_sm_query_read_data(count, nvc0, wait, hq, cfg, mp_count); in nvc0_hw_sm_get_query_result()
2696 ret = nvc0_hw_sm_query_read_data(count, nvc0, wait, hq, cfg, mp_count); in nvc0_hw_sm_get_query_result()
2623 nvc0_hw_sm_query_read_data(uint32_t count[32][8], struct nvc0_context *nvc0, bool wait, struct nvc0_hw_query *hq, const struct nvc0_hw_sm_query_cfg *cfg, unsigned mp_count) nvc0_hw_sm_query_read_data() argument
2649 nve4_hw_sm_query_read_data(uint32_t count[32][8], struct nvc0_context *nvc0, bool wait, struct nvc0_hw_query *hq, const struct nvc0_hw_sm_query_cfg *cfg, unsigned mp_count) nve4_hw_sm_query_read_data() argument
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H A Dnvc0_screen.h84 uint16_t mp_count; member
H A Dnve4_compute.c101 PUSH_DATAh(push, screen->tls->size / screen->mp_count); in nve4_screen_compute_setup()
102 PUSH_DATA (push, (screen->tls->size / screen->mp_count) & ~0x7fff); in nve4_screen_compute_setup()
106 PUSH_DATAh(push, screen->tls->size / screen->mp_count); in nve4_screen_compute_setup()
107 PUSH_DATA (push, (screen->tls->size / screen->mp_count) & ~0x7fff); in nve4_screen_compute_setup()
H A Dnvc0_screen.c925 size *= screen->mp_count; in nvc0_screen_resize_tls_area()
1352 screen->mp_count = value >> 8; in nvc0_screen_create()
1353 screen->mp_count_compute = screen->mp_count; in nvc0_screen_create()
H A Dnvc0_compute.c63 PUSH_DATA (push, screen->mp_count); in nvc0_screen_compute_setup()

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