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Searched refs:midgard_reg_mode_32 (Results 1 - 6 of 6) sorted by relevance

/third_party/mesa3d/src/panfrost/midgard/
H A Dmidgard_print_constant.c84 case midgard_reg_mode_32: in mir_print_constant_component()
H A Ddisassemble.c360 case midgard_reg_mode_32: in bits_for_mode()
527 midgard_reg_mode_32 : midgard_reg_mode_16, in print_scalar_constant()
1404 midgard_reg_mode_32, mask); in print_load_store_instr()
1461 midgard_reg_mode_32, 0xFF); in print_load_store_instr()
1786 print_vec_swizzle(fp, texture->swizzle, midgard_src_passthrough, midgard_reg_mode_32, 0xFF); in print_texture_word()
1793 print_vec_swizzle(fp, texture->in_reg_swizzle, exp, midgard_reg_mode_32, 0xFF); in print_texture_word()
1818 print_vec_swizzle(fp, swizzle, exp, midgard_reg_mode_32, 0xFF); in print_texture_word()
H A Dmidgard_ops.c203 #define M32 midgard_reg_mode_32
H A Dmidgard.h255 midgard_reg_mode_32 = 2, enumerator
H A Dmidgard_emit.c313 } else if (reg_mode == midgard_reg_mode_32 && sz == 16) { in mir_pack_swizzle()
H A Dmidgard_compile.c2694 return midgard_reg_mode_32; in reg_mode_for_bitsize()

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