/third_party/vixl/test/aarch32/ |
H A D | test-simulator-cond-rd-memop-immediate-512-a32.cc | 146 uint32_t memop[2]; member 3338 #include "aarch32/traces/simulator-cond-rd-memop-immediate-512-ldrh-a32.h" 3339 #include "aarch32/traces/simulator-cond-rd-memop-immediate-512-ldrsb-a32.h" 3340 #include "aarch32/traces/simulator-cond-rd-memop-immediate-512-ldrsh-a32.h" 3341 #include "aarch32/traces/simulator-cond-rd-memop-immediate-512-strh-a32.h" 3349 const MemOperand& memop); 3390 MemOperand memop(rn, sign, offset, addr_mode); in TestHelper() 3425 Register base_register = memop.GetBaseRegister(); in TestHelper() 3429 __ Ldr(memop_tmp, MemOperand(input_ptr, offsetof(Inputs, memop) + 4)); in TestHelper() 3435 if (!memop in TestHelper() 3561 uint32_t memop[2] = {results[i]->outputs[j].memop[0], TestHelper() local [all...] |
H A D | test-simulator-cond-rd-memop-immediate-8192-a32.cc | 146 uint32_t memop[2]; member 3338 #include "aarch32/traces/simulator-cond-rd-memop-immediate-8192-ldr-a32.h" 3339 #include "aarch32/traces/simulator-cond-rd-memop-immediate-8192-ldrb-a32.h" 3340 #include "aarch32/traces/simulator-cond-rd-memop-immediate-8192-str-a32.h" 3341 #include "aarch32/traces/simulator-cond-rd-memop-immediate-8192-strb-a32.h" 3349 const MemOperand& memop); 3390 MemOperand memop(rn, sign, offset, addr_mode); in TestHelper() 3425 Register base_register = memop.GetBaseRegister(); in TestHelper() 3429 __ Ldr(memop_tmp, MemOperand(input_ptr, offsetof(Inputs, memop) + 4)); in TestHelper() 3435 if (!memop in TestHelper() 3561 uint32_t memop[2] = {results[i]->outputs[j].memop[0], TestHelper() local [all...] |
H A D | test-simulator-cond-rd-memop-rs-a32.cc | 151 uint32_t memop[2]; member 3345 #include "aarch32/traces/simulator-cond-rd-memop-rs-ldr-a32.h" 3346 #include "aarch32/traces/simulator-cond-rd-memop-rs-ldrb-a32.h" 3347 #include "aarch32/traces/simulator-cond-rd-memop-rs-ldrh-a32.h" 3348 #include "aarch32/traces/simulator-cond-rd-memop-rs-ldrsb-a32.h" 3349 #include "aarch32/traces/simulator-cond-rd-memop-rs-ldrsh-a32.h" 3350 #include "aarch32/traces/simulator-cond-rd-memop-rs-str-a32.h" 3351 #include "aarch32/traces/simulator-cond-rd-memop-rs-strb-a32.h" 3352 #include "aarch32/traces/simulator-cond-rd-memop-rs-strh-a32.h" 3360 const MemOperand& memop); 3578 uint32_t memop[2] = {results[i]->outputs[j].memop[0], TestHelper() local [all...] |
H A D | test-simulator-cond-rd-memop-rs-shift-amount-1to31-a32.cc | 149 uint32_t memop[2]; member 3343 #include "aarch32/traces/simulator-cond-rd-memop-rs-shift-amount-1to31-ldr-a32.h" 3344 #include "aarch32/traces/simulator-cond-rd-memop-rs-shift-amount-1to31-ldrb-a32.h" 3345 #include "aarch32/traces/simulator-cond-rd-memop-rs-shift-amount-1to31-str-a32.h" 3346 #include "aarch32/traces/simulator-cond-rd-memop-rs-shift-amount-1to31-strb-a32.h" 3354 const MemOperand& memop); 3397 MemOperand memop(rn, sign, rm, shift, amount, addr_mode); in TestHelper() 3434 Register base_register = memop.GetBaseRegister(); in TestHelper() 3438 __ Ldr(memop_tmp, MemOperand(input_ptr, offsetof(Inputs, memop) + 4)); in TestHelper() 3444 if (!memop in TestHelper() 3574 uint32_t memop[2] = {results[i]->outputs[j].memop[0], TestHelper() local [all...] |
H A D | test-simulator-cond-rd-memop-rs-shift-amount-1to32-a32.cc | 149 uint32_t memop[2]; member 3343 #include "aarch32/traces/simulator-cond-rd-memop-rs-shift-amount-1to32-ldr-a32.h" 3344 #include "aarch32/traces/simulator-cond-rd-memop-rs-shift-amount-1to32-ldrb-a32.h" 3345 #include "aarch32/traces/simulator-cond-rd-memop-rs-shift-amount-1to32-str-a32.h" 3346 #include "aarch32/traces/simulator-cond-rd-memop-rs-shift-amount-1to32-strb-a32.h" 3354 const MemOperand& memop); 3397 MemOperand memop(rn, sign, rm, shift, amount, addr_mode); in TestHelper() 3434 Register base_register = memop.GetBaseRegister(); in TestHelper() 3438 __ Ldr(memop_tmp, MemOperand(input_ptr, offsetof(Inputs, memop) + 4)); in TestHelper() 3444 if (!memop in TestHelper() 3574 uint32_t memop[2] = {results[i]->outputs[j].memop[0], TestHelper() local [all...] |
H A D | test-assembler-cond-rd-memop-immediate-512-a32.cc | 3603 #include "aarch32/traces/assembler-cond-rd-memop-immediate-512-ldrh-a32.h" 3604 #include "aarch32/traces/assembler-cond-rd-memop-immediate-512-ldrsb-a32.h" 3605 #include "aarch32/traces/assembler-cond-rd-memop-immediate-512-ldrsh-a32.h" 3606 #include "aarch32/traces/assembler-cond-rd-memop-immediate-512-strh-a32.h" 3614 const MemOperand& memop); 3632 MemOperand memop(rn, sign, offset, addr_mode); in TestHelper() 3642 (masm.*instruction)(cond, rd, memop); in TestHelper()
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H A D | test-assembler-cond-rd-memop-immediate-8192-a32.cc | 3603 #include "aarch32/traces/assembler-cond-rd-memop-immediate-8192-ldr-a32.h" 3604 #include "aarch32/traces/assembler-cond-rd-memop-immediate-8192-ldrb-a32.h" 3605 #include "aarch32/traces/assembler-cond-rd-memop-immediate-8192-str-a32.h" 3606 #include "aarch32/traces/assembler-cond-rd-memop-immediate-8192-strb-a32.h" 3614 const MemOperand& memop); 3632 MemOperand memop(rn, sign, offset, addr_mode); in TestHelper() 3642 (masm.*instruction)(cond, rd, memop); in TestHelper()
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H A D | test-assembler-cond-rd-memop-rs-a32.cc | 3607 #include "aarch32/traces/assembler-cond-rd-memop-rs-ldr-a32.h" 3608 #include "aarch32/traces/assembler-cond-rd-memop-rs-ldrb-a32.h" 3609 #include "aarch32/traces/assembler-cond-rd-memop-rs-ldrh-a32.h" 3610 #include "aarch32/traces/assembler-cond-rd-memop-rs-ldrsb-a32.h" 3611 #include "aarch32/traces/assembler-cond-rd-memop-rs-ldrsh-a32.h" 3612 #include "aarch32/traces/assembler-cond-rd-memop-rs-str-a32.h" 3613 #include "aarch32/traces/assembler-cond-rd-memop-rs-strb-a32.h" 3614 #include "aarch32/traces/assembler-cond-rd-memop-rs-strh-a32.h" 3622 const MemOperand& memop); 3640 MemOperand memop(r in TestHelper() [all...] |
H A D | test-assembler-cond-rd-memop-rs-shift-amount-1to31-a32.cc | 3605 #include "aarch32/traces/assembler-cond-rd-memop-rs-shift-amount-1to31-ldr-a32.h" 3606 #include "aarch32/traces/assembler-cond-rd-memop-rs-shift-amount-1to31-ldrb-a32.h" 3607 #include "aarch32/traces/assembler-cond-rd-memop-rs-shift-amount-1to31-str-a32.h" 3608 #include "aarch32/traces/assembler-cond-rd-memop-rs-shift-amount-1to31-strb-a32.h" 3616 const MemOperand& memop); 3636 MemOperand memop(rn, sign, rm, shift, amount, addr_mode); in TestHelper() 3646 (masm.*instruction)(cond, rd, memop); in TestHelper()
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H A D | test-assembler-cond-rd-memop-rs-shift-amount-1to32-a32.cc | 3605 #include "aarch32/traces/assembler-cond-rd-memop-rs-shift-amount-1to32-ldr-a32.h" 3606 #include "aarch32/traces/assembler-cond-rd-memop-rs-shift-amount-1to32-ldrb-a32.h" 3607 #include "aarch32/traces/assembler-cond-rd-memop-rs-shift-amount-1to32-str-a32.h" 3608 #include "aarch32/traces/assembler-cond-rd-memop-rs-shift-amount-1to32-strb-a32.h" 3616 const MemOperand& memop); 3636 MemOperand memop(rn, sign, rm, shift, amount, addr_mode); in TestHelper() 3646 (masm.*instruction)(cond, rd, memop); in TestHelper()
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/third_party/node/deps/v8/src/diagnostics/arm/ |
H A D | disasm-arm.cc | 508 if (format[1] == 'e') { // 'memop: load/store instructions. in FormatOption() 509 DCHECK(STRING_STARTS_WITH(format, "memop")); in FormatOption() 820 Format(instr, "'memop'cond's 'rd, ['rn], -'rm"); in DecodeType01() 822 Format(instr, "'memop'cond's 'rd, ['rn], #-'off8"); in DecodeType01() 828 Format(instr, "'memop'cond's 'rd, ['rn], +'rm"); in DecodeType01() 830 Format(instr, "'memop'cond's 'rd, ['rn], #+'off8"); in DecodeType01() 836 Format(instr, "'memop'cond's 'rd, ['rn, -'rm]'w"); in DecodeType01() 838 Format(instr, "'memop'cond's 'rd, ['rn, #-'off8]'w"); in DecodeType01() 844 Format(instr, "'memop'cond's 'rd, ['rn, +'rm]'w"); in DecodeType01() 846 Format(instr, "'memop'con in DecodeType01() [all...] |
/third_party/ltp/tools/sparse/sparse-src/ |
H A D | example.c | 826 static struct operand *get_address_operand(struct bb_state *state, struct instruction *memop) in get_address_operand() argument 829 struct operand *op = get_generic_operand(state, memop->src); in get_address_operand() 833 op->offset += memop->offset; in get_address_operand() 837 base = getreg(state, memop->src, NULL); in get_address_operand() 841 op->offset = memop->offset; in get_address_operand() 847 static const char *address(struct bb_state *state, struct instruction *memop) in address() argument 849 struct operand *op = get_address_operand(state, memop); in address()
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/third_party/node/deps/v8/src/codegen/arm64/ |
H A D | assembler-arm64.cc | 1251 Instr memop = op | Rt(rt) | Rt2(rt2) | RnSP(addr.base()) | in LoadStorePair() local 1269 Emit(addrmodeop | memop); in LoadStorePair() 2244 "Opcodes must match for NEON post index memop."); in LoadStoreStructAddrModeField() 3953 Instr memop = op | Rt(rt) | RnSP(addr.base()); in LoadStore() local 3960 Emit(LoadStoreUnsignedOffsetFixed | memop | in LoadStore() 3965 Emit(LoadStoreUnscaledOffsetFixed | memop | ImmLS(offset)); in LoadStore() 3984 Emit(LoadStoreRegisterOffsetFixed | memop | Rm(addr.regoffset()) | in LoadStore() 3992 Emit(LoadStorePreIndexFixed | memop | ImmLS(offset)); in LoadStore() 3995 Emit(LoadStorePostIndexFixed | memop | ImmLS(offset)); in LoadStore()
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/third_party/vixl/src/aarch64/ |
H A D | assembler-aarch64.cc | 1131 Instr memop = op | Rt(rt) | Rt2(rt2) | RnSP(addr.GetBaseRegister()) | in LoadStorePair() local 1146 Instr emitop = addrmodeop | memop; in LoadStorePair()
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