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Help
Searched
refs:max_pipeline
(Results
1 - 3
of
3
) sorted by relevance
/third_party/mesa3d/src/amd/vulkan/
H
A
D
radv_meta_resolve_fs.c
375
pipeline = &device->meta_state.resolve_fragment.depth[samples_log2].
max_pipeline
;
in create_depth_stencil_resolve_pipeline()
377
pipeline = &device->meta_state.resolve_fragment.stencil[samples_log2].
max_pipeline
;
in create_depth_stencil_resolve_pipeline()
589
state->resolve_fragment.depth[i].
max_pipeline
, &state->alloc);
in radv_device_finish_meta_resolve_fragment_state()
595
state->resolve_fragment.stencil[i].
max_pipeline
, &state->alloc);
in radv_device_finish_meta_resolve_fragment_state()
749
pipeline = &device->meta_state.resolve_fragment.depth[samples_log2].
max_pipeline
;
in emit_depth_stencil_resolve()
751
pipeline = &device->meta_state.resolve_fragment.stencil[samples_log2].
max_pipeline
;
in emit_depth_stencil_resolve()
H
A
D
radv_meta_resolve_cs.c
409
&state->resolve_compute.depth[i].
max_pipeline
);
in radv_device_init_meta_resolve_compute_state()
421
&state->resolve_compute.stencil[i].
max_pipeline
);
in radv_device_init_meta_resolve_compute_state()
461
state->resolve_compute.depth[i].
max_pipeline
, &state->alloc);
in radv_device_finish_meta_resolve_compute_state()
467
state->resolve_compute.stencil[i].
max_pipeline
, &state->alloc);
in radv_device_finish_meta_resolve_compute_state()
625
pipeline = &device->meta_state.resolve_compute.depth[samples_log2].
max_pipeline
;
in emit_depth_stencil_resolve()
627
pipeline = &device->meta_state.resolve_compute.stencil[samples_log2].
max_pipeline
;
in emit_depth_stencil_resolve()
H
A
D
radv_private.h
598
VkPipeline
max_pipeline
;
member
604
VkPipeline
max_pipeline
;
member
620
VkPipeline
max_pipeline
;
member
626
VkPipeline
max_pipeline
;
member
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