| /third_party/node/deps/openssl/openssl/crypto/sha/asm/ |
| H A D | sha1-mips.pl | 392 lui $K,0x5a82
397 lui $K,0x5a82
405 lui $K,0x6ed9
410 lui $K,0x8f1b
415 lui $K,0xca62
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| /third_party/openssl/crypto/sha/asm/ |
| H A D | sha1-mips.pl | 392 lui $K,0x5a82
397 lui $K,0x5a82
405 lui $K,0x6ed9
410 lui $K,0x8f1b
415 lui $K,0xca62
|
| /third_party/musl/src/unistd/mips64/ |
| H A D | pipe.s | 5 lui $3, %hi(%neg(%gp_rel(pipe)))
|
| /third_party/musl/src/unistd/mips/ |
| H A D | pipe.s | 6 lui $gp, %hi(_gp_disp)
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| /third_party/musl/src/unistd/mipsn32/ |
| H A D | pipe.s | 5 lui $3, %hi(%neg(%gp_rel(pipe)))
|
| /third_party/musl/src/ldso/mipsn32/ |
| H A D | dlsym.s | 6 lui $3, %hi(%neg(%gp_rel(dlsym)))
|
| /third_party/musl/src/ldso/mips64/ |
| H A D | dlsym.s | 6 lui $3, %hi(%neg(%gp_rel(dlsym)))
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| /third_party/musl/src/ldso/mips/ |
| H A D | dlsym.s | 6 lui $gp, %hi(_gp_disp)
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| /third_party/musl/src/signal/mips/ |
| H A D | sigsetjmp.s | 9 lui $gp, %hi(_gp_disp)
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| /third_party/musl/src/signal/mipsn32/ |
| H A D | sigsetjmp.s | 8 lui $3, %hi(%neg(%gp_rel(sigsetjmp)))
|
| /third_party/musl/src/signal/mips64/ |
| H A D | sigsetjmp.s | 8 lui $3, %hi(%neg(%gp_rel(sigsetjmp)))
|
| /third_party/node/deps/openssl/config/archs/linux64-mips64/asm/crypto/sha/ |
| H A D | sha1-mips.S | 38 lui $31,0x5a82
43 lui $31,0x5a82
941 lui $31,0x6ed9
1603 lui $31,0x8f1b
2345 lui $31,0xca62
|
| /third_party/node/deps/openssl/config/archs/linux64-mips64/asm_avx2/crypto/sha/ |
| H A D | sha1-mips.S | 38 lui $31,0x5a82
43 lui $31,0x5a82
941 lui $31,0x6ed9
1603 lui $31,0x8f1b
2345 lui $31,0xca62
|
| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
| H A D | IceAssemblerMIPS32.h | 193 void lui(const Operand *OpRt, const Operand *OpImm, const RelocOp Reloc);
|
| H A D | IceInstMIPS32.cpp | 808 Asm->lui(getDest(), getSrc(0), Reloc); in emitIAS()
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| /third_party/node/deps/v8/src/codegen/mips64/ |
| H A D | macro-assembler-mips64.cc | 1566 lui(rd, j.immediate() >> kLuiShift & kImm16Mask); in CallRecordWriteStub()
1708 lui(rd, j.immediate() >> kLuiShift & kImm16Mask); in CallRecordWriteStub()
1717 lui(rd, j.immediate() >> kLuiShift & kImm16Mask); in CallRecordWriteStub()
1777 lui(rd, tmp >> kLuiShift & kImm16Mask); in CallRecordWriteStub()
1887 lui(rd, (immediate >> 32) & kImm16Mask); in CallRecordWriteStub()
1894 lui(rd, (j.immediate() >> 32) & kImm16Mask); in CallRecordWriteStub()
1902 lui(rd, imm >> kLuiShift & kImm16Mask); in CallRecordWriteStub()
1909 lui(rd, (j.immediate() >> 48) & kImm16Mask); in CallRecordWriteStub()
4515 lui(t9, (imm32 & kHiMaskOf32) >> kLuiShift); // Branch delay slot. in CallRecordWriteStub()
4534 lui(t in CallRecordWriteStub()
[all...] |
| /third_party/node/deps/v8/src/codegen/riscv64/ |
| H A D | assembler-riscv64.cc | 142 // specially coded on RISC-V means that it is a lui/addi instruction, and that in IsCodedSpecially()
1515 void Assembler::lui(Register rd, int32_t imm20) { GenInstrU(LUI, rd, imm20); } in lui() function in v8::internal::Assembler
3223 lui(rd, (int32_t)high_20); in RV_li()
3255 lui(rd, (int32_t)high_20); in RV_li()
3289 lui(temp_reg, (int32_t)high_20); in RV_li()
3312 lui(rd, (int32_t)high_20); in RV_li()
3489 lui(rd, (int32_t)high_20); in li_ptr()
3499 lui(rd, (imm + (1LL << 47) + (1LL << 35) + (1LL << 23) + (1LL << 11)) >> in li_constant()
3522 // immediate field of lui instruction immediately following the ebreak to in break_()
3526 lui(zero_re in break_()
[all...] |
| /third_party/node/deps/v8/src/codegen/mips/ |
| H A D | assembler-mips.cc | 188 // specially coded on MIPS means that it is a lui/ori instruction, and that is in IsCodedSpecially()
754 // Use just lui and jic instructions. Insert lower part of the target address in
758 // in jic register with lui instruction.
2042 lui(scratch, (loaded_offset >> kLuiShift) & kImm16Mask); in AdjustBaseAndOffset()
2169 void Assembler::lui(Register rd, int32_t j) { in lui() function in v8::internal::Assembler
2175 // This instruction uses same opcode as 'lui'. The difference in encoding is in aui()
2176 // 'lui' has zero reg. for rs field. in aui()
3709 // Interpret 2 instructions generated by li (lui/ori) or optimized pairs in target_address_at()
3710 // lui/jic, aui/jic or lui/jial in target_address_at()
[all...] |
| H A D | macro-assembler-mips.cc | 1351 lui(rd, (j.immediate() >> kLuiShift) & kImm16Mask); in CallRecordWriteStub()
1371 lui(rd, (immediate >> kLuiShift) & kImm16Mask); in CallRecordWriteStub()
2577 lui(mask, 0x8000); in CallRecordWriteStub()
3715 lui(t9, lui_offset); in CallRecordWriteStub()
3864 lui(t9, lui_offset); in CallRecordWriteStub()
|
| /third_party/node/deps/openssl/config/archs/linux64-mips64/asm/crypto/aes/ |
| H A D | aes-mips.S | 1494 lui $2,0x8080
1499 lui $25,0x1b1b
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| /third_party/node/deps/openssl/config/archs/linux64-mips64/asm_avx2/crypto/aes/ |
| H A D | aes-mips.S | 1494 lui $2,0x8080
1499 lui $25,0x1b1b
|
| /third_party/node/deps/v8/src/diagnostics/mips64/ |
| H A D | disasm-mips64.cc | 2101 Format(instr, "lui 'rt, 'imm16x"); in DecodeTypeImmediate()
2106 Format(instr, "lui 'rt, 'imm16x"); in DecodeTypeImmediate()
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| /third_party/node/deps/v8/src/diagnostics/mips/ |
| H A D | disasm-mips.cc | 1866 Format(instr, "lui 'rt, 'imm16x"); in DecodeTypeImmediate()
1871 Format(instr, "lui 'rt, 'imm16x"); in DecodeTypeImmediate()
|
| /third_party/node/deps/openssl/openssl/crypto/aes/asm/ |
| H A D | aes-mips.pl | 1734 lui $x80808080,0x8080
1739 lui $x1b1b1b1b,0x1b1b
|
| /third_party/openssl/crypto/aes/asm/ |
| H A D | aes-mips.pl | 1734 lui $x80808080,0x8080
1739 lui $x1b1b1b1b,0x1b1b
|