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Searched refs:low_gp (Results 1 - 7 of 7) sorted by relevance

/third_party/node/deps/v8/src/wasm/baseline/mips/
H A Dliftoff-assembler-mips.h101 assm->lw(dst.low_gp(), in Load()
128 assm->Usw(src.low_gp(), in Store()
153 assm->Push(reg.high_gp(), reg.low_gp()); in push()
171 if (reg != must_not_alias.low_gp() && reg != must_not_alias.high_gp()) in EnsureNoAlias()
174 DCHECK_NE(must_not_alias.low_gp(), tmp); in EnsureNoAlias()
212 assm->TurboAssembler::Move(kScratchReg, tmp.low_gp()); in ChangeEndiannessLoad()
213 assm->TurboAssembler::ByteSwapSigned(tmp.low_gp(), tmp.high_gp(), 4); in ChangeEndiannessLoad()
217 assm->TurboAssembler::ByteSwapUnsigned(tmp.low_gp(), tmp.low_gp(), 2); in ChangeEndiannessLoad()
221 assm->TurboAssembler::ByteSwapSigned(tmp.low_gp(), tm in ChangeEndiannessLoad()
[all...]
/third_party/node/deps/v8/src/wasm/baseline/ia32/
H A Dliftoff-assembler-ia32.h82 assm->mov(dst.low_gp(), src); in Load()
110 assm->mov(dst, src.low_gp()); in Store()
143 assm->push(reg.low_gp()); in push()
166 assm->mov(reg.high_gp(), reg.low_gp()); in SignExtendI32ToI64()
338 TurboAssembler::Move(reg.low_gp(), Immediate(low_word)); in LoadConstant()
457 movzx_b(dst.low_gp(), src_op); in Load()
461 movsx_b(dst.low_gp(), src_op); in Load()
471 movzx_w(dst.low_gp(), src_op); in Load()
475 movsx_w(dst.low_gp(), src_op); in Load()
482 mov(dst.low_gp(), src_o in Load()
[all...]
/third_party/node/deps/v8/src/wasm/baseline/arm/
H A Dliftoff-assembler-arm.h156 Register dst_low = dst.low_gp(); in I64Binop()
162 (assm->*op)(dst_low, lhs.low_gp(), rhs.low_gp(), SetCC, al); in I64Binop()
165 if (dst_low != dst.low_gp()) assm->mov(dst.low_gp(), dst_low); in I64Binop()
176 DCHECK_NE(dst.low_gp(), lhs.high_gp()); in I64BinopI()
179 (assm->*op)(dst.low_gp(), lhs.low_gp(), Operand(imm_low_word), SetCC, al); in I64BinopI()
189 Register src_low = src.low_gp(); in I64Shiftop()
191 Register dst_low = dst.low_gp(); in I64Shiftop()
[all...]
/third_party/node/deps/v8/src/wasm/baseline/
H A Dliftoff-register.h169 code == ForPair(reg.low_gp(), reg.high_gp()).liftoff_code()) || in from_liftoff_code()
239 if (!kNeedS128RegPair) return LiftoffRegister(low_gp()); in low()
240 return is_gp_pair() ? LiftoffRegister(low_gp()) : LiftoffRegister(low_fp()); in low()
250 Register low_gp() const { in low_gp() function in v8::internal::wasm::LiftoffRegister
319 return os << "<" << reg.low_gp() << "+" << reg.high_gp() << ">"; in operator <<()
H A Dliftoff-assembler.h1580 // If {dst.low_gp()} does not overlap with {lhs.high_gp()} or {rhs.high_gp()}, in EmitI64IndependentHalfOperation()
1583 (assm->*op)(dst.low_gp(), lhs.low_gp(), rhs.low_gp()); in EmitI64IndependentHalfOperation()
1587 // If {dst.high_gp()} does not overlap with {lhs.low_gp()} or {rhs.low_gp()}, in EmitI64IndependentHalfOperation()
1591 (assm->*op)(dst.low_gp(), lhs.low_gp(), rhs.low_gp()); in EmitI64IndependentHalfOperation()
1596 (assm->*op)(tmp, lhs.low_gp(), rh in EmitI64IndependentHalfOperation()
[all...]
H A Dliftoff-compiler.cc1874 amount.is_gp_pair() ? amount.low_gp() : amount.gp()); \ in BinOp()
2808 kNeedI64RegPair && index.is_gp_pair() ? index.low_gp() : index.gp();
4187 Store32BitExceptionValue(values_array, index_in_array, value.low_gp(),
4223 Load32BitExceptionValue(dst.low_gp(), values_array, index, pinned);
/third_party/node/deps/v8/src/wasm/
H A Dwasm-debug.cc605 uint32_t low_word = ReadUnalignedValue<uint32_t>(gp_addr(reg.low_gp())); in GetValue()

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