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Searched refs:lmul (Results 1 - 5 of 5) sorted by relevance

/third_party/node/deps/v8/src/codegen/riscv64/
H A Dassembler-riscv64.h1336 void set(Register rd, VSew sew, Vlmul lmul) { in set() argument
1337 if (sew != sew_ || lmul != lmul_ || vl != vlmax()) { in set()
1339 lmul_ = lmul; in set()
1345 void set(Register rd, int8_t sew, int8_t lmul) { in set() argument
1348 DCHECK_GE(lmul, m1); in set()
1349 DCHECK_LE(lmul, mf2); in set()
1350 set(rd, VSew(sew), Vlmul(lmul)); in set()
1360 void set(Register rd, Register rs1, VSew sew, Vlmul lmul) { in set() argument
1361 if (sew != sew_ || lmul != lmul_) { in set()
1363 lmul_ = lmul; in set()
1369 set(VSew sew, Vlmul lmul) set() argument
[all...]
H A Dmacro-assembler-riscv64.h958 Vlmul lmul) { in WasmRvvExtractLane()
959 VU.set(kScratchReg, sew, lmul); in WasmRvvExtractLane()
968 Vlmul lmul);
971 Vlmul lmul);
973 Vlmul lmul);
975 Vlmul lmul);
977 Vlmul lmul);
979 Vlmul lmul);
957 WasmRvvExtractLane(Register dst, VRegister src, int8_t idx, VSew sew, Vlmul lmul) WasmRvvExtractLane() argument
H A Dmacro-assembler-riscv64.cc3924 VSew sew, Vlmul lmul) { in WasmRvvEq()
3925 VU.set(kScratchReg, sew, lmul); in WasmRvvEq()
3933 VSew sew, Vlmul lmul) { in WasmRvvNe()
3934 VU.set(kScratchReg, sew, lmul); in WasmRvvNe()
3942 VSew sew, Vlmul lmul) { in WasmRvvGeS()
3943 VU.set(kScratchReg, sew, lmul); in WasmRvvGeS()
3951 VSew sew, Vlmul lmul) { in WasmRvvGeU()
3952 VU.set(kScratchReg, sew, lmul); in WasmRvvGeU()
3960 VSew sew, Vlmul lmul) { in WasmRvvGtS()
3961 VU.set(kScratchReg, sew, lmul); in WasmRvvGtS()
3923 WasmRvvEq(VRegister dst, VRegister lhs, VRegister rhs, VSew sew, Vlmul lmul) WasmRvvEq() argument
3932 WasmRvvNe(VRegister dst, VRegister lhs, VRegister rhs, VSew sew, Vlmul lmul) WasmRvvNe() argument
3941 WasmRvvGeS(VRegister dst, VRegister lhs, VRegister rhs, VSew sew, Vlmul lmul) WasmRvvGeS() argument
3950 WasmRvvGeU(VRegister dst, VRegister lhs, VRegister rhs, VSew sew, Vlmul lmul) WasmRvvGeU() argument
3959 WasmRvvGtS(VRegister dst, VRegister lhs, VRegister rhs, VSew sew, Vlmul lmul) WasmRvvGtS() argument
3968 WasmRvvGtU(VRegister dst, VRegister lhs, VRegister rhs, VSew sew, Vlmul lmul) WasmRvvGtU() argument
[all...]
/third_party/node/deps/v8/src/diagnostics/riscv64/
H A Ddisasm-riscv64.cc296 const char* lmul = instr->RvvLMUL(); in PrintRvvLMUL() local
297 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%s", lmul); in PrintRvvLMUL()
825 DCHECK(STRING_STARTS_WITH(format, "lmul")); in FormatOption()
2636 Format(instr, "vsetvli 'rd, 'rs1, 'sew, 'lmul"); in DecodeVType()
2642 Format(instr, "vsetivli 'rd, 'uimm, 'sew, 'lmul"); in DecodeVType()
/third_party/node/deps/v8/src/compiler/backend/riscv64/
H A Dinstruction-selector-riscv64.cc411 InstructionCode opcode, VSew sew, Vlmul lmul) { in EmitS128Load()
420 g.UseImmediate(lmul)); in EmitS128Load()
428 g.UseImmediate(sew), g.UseImmediate(lmul)); in EmitS128Load()
410 EmitS128Load(InstructionSelector* selector, Node* node, InstructionCode opcode, VSew sew, Vlmul lmul) EmitS128Load() argument

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